mirror of
https://github.com/torvalds/linux.git
synced 2026-04-18 06:44:00 -04:00
e20043b476
Move the asm/xor.h headers to lib/raid/xor/$(SRCARCH)/xor_arch.h and include/linux/raid/xor_impl.h to lib/raid/xor/xor_impl.h so that the xor.ko module implementation is self-contained in lib/raid/. As this remove the asm-generic mechanism a new kconfig symbol is added to indicate that a architecture-specific implementations exists, and xor_arch.h should be included. Link: https://lkml.kernel.org/r/20260327061704.3707577-22-hch@lst.de Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Eric Biggers <ebiggers@kernel.org> Tested-by: Eric Biggers <ebiggers@kernel.org> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Gordeev <agordeev@linux.ibm.com> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Andreas Larsson <andreas@gaisler.com> Cc: Anton Ivanov <anton.ivanov@cambridgegreys.com> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: "Borislav Petkov (AMD)" <bp@alien8.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Mason <clm@fb.com> Cc: Christian Borntraeger <borntraeger@linux.ibm.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: David S. Miller <davem@davemloft.net> Cc: David Sterba <dsterba@suse.com> Cc: Heiko Carstens <hca@linux.ibm.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jason A. Donenfeld <jason@zx2c4.com> Cc: Johannes Berg <johannes@sipsolutions.net> Cc: Li Nan <linan122@huawei.com> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Magnus Lindholm <linmag7@gmail.com> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Nicholas Piggin <npiggin@gmail.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Richard Weinberger <richard@nod.at> Cc: Russell King <linux@armlinux.org.uk> Cc: Song Liu <song@kernel.org> Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Ted Ts'o <tytso@mit.edu> Cc: Vasily Gorbik <gor@linux.ibm.com> Cc: WANG Xuerui <kernel@xen0n.name> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
37 lines
1.2 KiB
C
37 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
#include <asm/cpufeature.h>
|
|
|
|
extern struct xor_block_template xor_block_pII_mmx;
|
|
extern struct xor_block_template xor_block_p5_mmx;
|
|
extern struct xor_block_template xor_block_sse;
|
|
extern struct xor_block_template xor_block_sse_pf64;
|
|
extern struct xor_block_template xor_block_avx;
|
|
|
|
/*
|
|
* When SSE is available, use it as it can write around L2. We may also be able
|
|
* to load into the L1 only depending on how the cpu deals with a load to a line
|
|
* that is being prefetched.
|
|
*
|
|
* When AVX2 is available, force using it as it is better by all measures.
|
|
*
|
|
* 32-bit without MMX can fall back to the generic routines.
|
|
*/
|
|
static __always_inline void __init arch_xor_init(void)
|
|
{
|
|
if (boot_cpu_has(X86_FEATURE_AVX) &&
|
|
boot_cpu_has(X86_FEATURE_OSXSAVE)) {
|
|
xor_force(&xor_block_avx);
|
|
} else if (IS_ENABLED(CONFIG_X86_64) || boot_cpu_has(X86_FEATURE_XMM)) {
|
|
xor_register(&xor_block_sse);
|
|
xor_register(&xor_block_sse_pf64);
|
|
} else if (boot_cpu_has(X86_FEATURE_MMX)) {
|
|
xor_register(&xor_block_pII_mmx);
|
|
xor_register(&xor_block_p5_mmx);
|
|
} else {
|
|
xor_register(&xor_block_8regs);
|
|
xor_register(&xor_block_8regs_p);
|
|
xor_register(&xor_block_32regs);
|
|
xor_register(&xor_block_32regs_p);
|
|
}
|
|
}
|