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Even though the DPI IP has a reset bit on all MediaTek SoCs, it is optional, and has always been unused until MT8195; specifically: on older SoCs, like MT8173, the reset bit is located in MMSYS, and on newer SoCs, like MT8195, it is located in VDOSYS. For this reason, allow specifying the resets and reset-names on all MediaTek SoCs. Those properties are optional because there are multiple ways to reset this IP and the reset lines in MM/VDO are used only if the IP cannot perform warm-reset. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
154 lines
3.5 KiB
YAML
154 lines
3.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek DPI and DP_INTF Controller
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maintainers:
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- CK Hu <ck.hu@mediatek.com>
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- Jitao shi <jitao.shi@mediatek.com>
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description: |
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The MediaTek DPI and DP_INTF function blocks are a sink of the display
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subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
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parallel output bus.
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt2701-dpi
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- mediatek,mt7623-dpi
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- mediatek,mt8173-dpi
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- mediatek,mt8183-dpi
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- mediatek,mt8186-dpi
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- mediatek,mt8188-dp-intf
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- mediatek,mt8192-dpi
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- mediatek,mt8195-dp-intf
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- mediatek,mt8195-dpi
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- items:
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- enum:
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- mediatek,mt6795-dpi
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- const: mediatek,mt8183-dpi
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- items:
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- enum:
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- mediatek,mt8365-dpi
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- const: mediatek,mt8192-dpi
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- items:
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- enum:
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- mediatek,mt8188-dpi
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- const: mediatek,mt8195-dpi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Pixel Clock
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- description: Engine Clock
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- description: DPI PLL
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clock-names:
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items:
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- const: pixel
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- const: engine
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- const: pll
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pinctrl-0: true
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pinctrl-1: true
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pinctrl-names:
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items:
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- const: default
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- const: sleep
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power-domains:
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description: |
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The MediaTek DPI module is typically associated with one of the
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following multimedia power domains:
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POWER_DOMAIN_DISPLAY
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POWER_DOMAIN_VDOSYS
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POWER_DOMAIN_MM
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The specific power domain used varies depending on the SoC design.
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It is recommended to explicitly add the appropriate power domain
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property to the DPI node in the device tree.
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maxItems: 1
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output port node. This port should be connected to the input port of an
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attached HDMI, LVDS or DisplayPort encoder chip.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: DPI input port
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: DPI output to an HDMI, LVDS or DisplayPort encoder input
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required:
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- port@0
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- port@1
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: dpi
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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oneOf:
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- required:
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- port
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- required:
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt8173-clk.h>
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#include <dt-bindings/power/mt8173-power.h>
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dpi: dpi@1401d000 {
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compatible = "mediatek,mt8173-dpi";
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reg = <0x1401d000 0x1000>;
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interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
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clocks = <&mmsys CLK_MM_DPI_PIXEL>,
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<&mmsys CLK_MM_DPI_ENGINE>,
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<&apmixedsys CLK_APMIXED_TVDPLL>;
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clock-names = "pixel", "engine", "pll";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dpi_pin_func>;
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pinctrl-1 = <&dpi_pin_idle>;
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port {
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dpi0_out: endpoint {
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remote-endpoint = <&hdmi0_in>;
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};
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};
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};
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...
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