Files
linux/Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml
David Lechner 37bb4033e4 spi: dt-bindings: change spi-{rx,tx}-bus-width to arrays
Change spi-rx-bus-width and spi-tx-bus-width properties from single
uint32 values to arrays of uint32 values. This allows describing SPI
peripherals connected to controllers that have multiple data lanes for
receiving or transmitting two or more words in parallel.

Each index in the array corresponds to a physical data lane (one or more
wires depending on the bus width). Additional mapping properties will be
needed in cases where a lane on the controller or peripheral is skipped.

Bindings that make use of this property are updated in the same commit
to avoid validation errors.

The adi,ad4030 binding can now better describe the chips multi-lane
capabilities, so that binding is refined and gets a new example.

Converting from single uint32 to array of uint32 does not break .dts/
.dtb files since there is no difference between specifying a single
uint32 value and an array with a single uint32 value in devicetree.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Link: https://patch.msgid.link/20260123-spi-add-multi-bus-support-v6-1-12af183c06eb@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2026-02-02 12:12:41 +00:00

270 lines
6.6 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad4695.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices Easy Drive Multiplexed SAR Analog to Digital Converters
maintainers:
- Michael Hennerich <Michael.Hennerich@analog.com>
- Nuno Sá <nuno.sa@analog.com>
description: |
A family of similar multi-channel analog to digital converters with SPI bus.
* https://www.analog.com/en/products/ad4695.html
* https://www.analog.com/en/products/ad4696.html
* https://www.analog.com/en/products/ad4697.html
* https://www.analog.com/en/products/ad4698.html
$ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- adi,ad4695
- adi,ad4696
- adi,ad4697
- adi,ad4698
reg:
maxItems: 1
spi-max-frequency:
maximum: 80000000
spi-cpol: true
spi-cpha: true
spi-rx-bus-width:
items:
minimum: 1
maximum: 4
avdd-supply:
description: Analog power supply.
vio-supply:
description: I/O pin power supply.
ldo-in-supply:
description: Internal LDO Input. Mutually exclusive with vdd-supply.
vdd-supply:
description: Core power supply. Mutually exclusive with ldo-in-supply.
ref-supply:
description:
External reference voltage. Mutually exclusive with refin-supply.
refin-supply:
description:
Internal reference buffer input. Mutually exclusive with ref-supply.
com-supply:
description: Common voltage supply for pseudo-differential analog inputs.
adi,no-ref-current-limit:
$ref: /schemas/types.yaml#/definitions/flag
description:
When this flag is present, the REF Overvoltage Reduced Current protection
is disabled.
adi,no-ref-high-z:
$ref: /schemas/types.yaml#/definitions/flag
description:
Enable this flag if the ref-supply requires Reference Input High-Z Mode
to be disabled for proper operation.
cnv-gpios:
description: The Convert Input (CNV). If omitted, CNV is tied to SPI CS.
maxItems: 1
reset-gpios:
description: The Reset Input (RESET). Should be configured GPIO_ACTIVE_LOW.
maxItems: 1
pwms:
description: PWM signal connected to the CNV pin.
maxItems: 1
interrupts:
minItems: 1
items:
- description: Signal coming from the BSY_ALT_GP0 pin (ALERT or BUSY).
- description: Signal coming from the GP2 pin (ALERT).
- description: Signal coming from the GP3 pin (BUSY).
interrupt-names:
minItems: 1
items:
- const: gp0
- const: gp2
- const: gp3
gpio-controller: true
"#gpio-cells":
const: 2
description: |
The first cell is the GPn number: 0 to 3.
The second cell takes standard GPIO flags.
'#trigger-source-cells':
description: |
First cell indicates the output signal: 0 = BUSY, 1 = ALERT.
Second cell indicates which GPn pin is used: 0, 2 or 3.
For convenience, macros for these values are available in
dt-bindings/iio/adc/adi,ad4695.h.
const: 2
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^in(?:[13579]|1[135])-supply$":
description:
Optional voltage supply for odd numbered channels when they are used as
the negative input for a pseudo-differential channel.
"^channel@[0-9a-f]$":
type: object
$ref: adc.yaml
unevaluatedProperties: false
description:
Describes each individual channel. In addition the properties defined
below, bipolar from adc.yaml is also supported.
properties:
reg:
maximum: 15
common-mode-channel:
description:
Describes the common mode channel for single channels. 0xFF is REFGND
and OxFE is COM. Macros are available for these values in
dt-bindings/iio/adc/adi,ad4695.h. Values 1 to 15 correspond to INx
inputs. Only odd numbered INx inputs can be used as common mode
channels.
enum: [1, 3, 5, 7, 9, 11, 13, 15, 0xFE, 0xFF]
default: 0xFF
adi,no-high-z:
$ref: /schemas/types.yaml#/definitions/flag
description:
Enable this flag if the input pin requires the Analog Input High-Z
Mode to be disabled for proper operation.
required:
- reg
allOf:
# bipolar mode can't be used with REFGND
- if:
properties:
common-mode-channel:
const: 0xFF
then:
properties:
bipolar: false
required:
- compatible
- reg
- avdd-supply
- vio-supply
allOf:
- oneOf:
- required:
- ldo-in-supply
- required:
- vdd-supply
- oneOf:
- required:
- ref-supply
- required:
- refin-supply
# the internal reference buffer always requires high-z mode
- if:
required:
- refin-supply
then:
properties:
adi,no-ref-high-z: false
# limit channels for 8-channel chips
- if:
properties:
compatible:
contains:
enum:
- adi,ad4697
- adi,ad4698
then:
patternProperties:
"^in(?:9|1[135])-supply$": false
"^channel@[0-7]$":
properties:
reg:
maximum: 7
common-mode-channel:
enum: [1, 3, 5, 7, 0xFE, 0xFF]
"^channel@[8-9a-f]$": false
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/iio/adc/adi,ad4695.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4695";
reg = <0>;
spi-cpol;
spi-cpha;
spi-max-frequency = <80000000>;
avdd-supply = <&power_supply>;
ldo-in-supply = <&power_supply>;
vio-supply = <&io_supply>;
refin-supply = <&supply_5V>;
com-supply = <&supply_2V5>;
in3-supply = <&supply_2V5>;
reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
#address-cells = <1>;
#size-cells = <0>;
/* Pseudo-differential channel between IN0 and REFGND. */
channel@0 {
reg = <0>;
};
/* Pseudo-differential channel between IN1 and COM. */
channel@1 {
reg = <1>;
common-mode-channel = <AD4695_COMMON_MODE_COM>;
bipolar;
};
/* Pseudo-differential channel between IN2 and IN3. */
channel@2 {
reg = <2>;
common-mode-channel = <3>;
bipolar;
};
};
};