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a7840365d1
Add PCIe PERST# group to support for PCIe RC. Signed-off-by: Jacky Chou <jacky_chou@aspeedtech.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
538 lines
9.1 KiB
YAML
538 lines
9.1 KiB
YAML
# SPDX-License-Identifier: GPL-2.0+
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED AST2600 Pin Controller
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maintainers:
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- Andrew Jeffery <andrew@aj.id.au>
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description: |+
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The pin controller node should be the child of a syscon node with the
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required property:
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- compatible: Should be one of the following:
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"aspeed,ast2600-scu", "syscon", "simple-mfd"
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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Note: According to the NCSI specification, the reference clock output pin
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(RMIIXRCLKO) is not required on the management controller side. To optimize
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pin usage, add "NCSI" pin groups that are equivalent to the RMII pin groups,
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but without the RMIIXRCLKO pin.
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properties:
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compatible:
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const: aspeed,ast2600-pinctrl
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additionalProperties:
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$ref: pinmux-node.yaml#
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additionalProperties: false
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properties:
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function:
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enum:
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- ADC0
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- ADC1
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- ADC10
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- ADC11
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- ADC12
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- ADC13
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- ADC14
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- ADC15
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- ADC2
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- ADC3
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- ADC4
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- ADC5
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- ADC6
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- ADC7
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- ADC8
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- ADC9
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- BMCINT
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- EMMC
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- ESPI
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- ESPIALT
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- FSI1
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- FSI2
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- FWQSPI
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- FWSPIABR
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- FWSPID
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- FWSPIWP
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- GPIT0
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- GPIT1
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- GPIT2
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- GPIT3
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- GPIT4
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- GPIT5
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- GPIT6
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- GPIT7
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- GPIU0
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- GPIU1
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- GPIU2
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- GPIU3
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- GPIU4
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- GPIU5
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- GPIU6
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- GPIU7
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- I2C1
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- I2C10
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- I2C11
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- I2C12
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- I2C13
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- I2C14
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- I2C15
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- I2C16
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- I2C2
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- I2C3
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- I2C4
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- I2C5
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- I2C6
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- I2C7
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- I2C8
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- I2C9
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- I3C1
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- I3C2
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- I3C3
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- I3C4
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- I3C5
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- I3C6
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- JTAGM
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- LHPD
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- LHSIRQ
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- LPC
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- LPCHC
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- LPCPD
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- LPCPME
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- LPCSMI
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- LSIRQ
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- MACLINK1
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- MACLINK2
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- MACLINK3
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- MACLINK4
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- MDIO1
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- MDIO2
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- MDIO3
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- MDIO4
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- NCTS1
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- NCTS2
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- NCTS3
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- NCTS4
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- NDCD1
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- NDCD2
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- NDCD3
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- NDCD4
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- NDSR1
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- NDSR2
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- NDSR3
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- NDSR4
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- NDTR1
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- NDTR2
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- NDTR3
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- NDTR4
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- NRI1
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- NRI2
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- NRI3
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- NRI4
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- NRTS1
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- NRTS2
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- NRTS3
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- NRTS4
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- OSCCLK
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- PCIERC1
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- PEWAKE
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- PWM0
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- PWM1
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- PWM10
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- PWM11
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- PWM12
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- PWM13
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- PWM14
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- PWM15
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- PWM2
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- PWM3
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- PWM4
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- PWM5
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- PWM6
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- PWM7
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- PWM8
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- PWM9
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- RGMII1
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- RGMII2
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- RGMII3
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- RGMII4
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- RMII1
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- RMII2
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- RMII3
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- RMII4
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- RXD1
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- RXD2
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- RXD3
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- RXD4
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- SALT1
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- SALT10
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- SALT11
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- SALT12
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- SALT13
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- SALT14
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- SALT15
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- SALT16
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- SALT2
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- SALT3
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- SALT4
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- SALT5
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- SALT6
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- SALT7
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- SALT8
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- SALT9
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- SD1
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- SD2
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- SGPM1
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- SGPM2
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- SGPS1
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- SGPS2
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- SIOONCTRL
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- SIOPBI
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- SIOPBO
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- SIOPWREQ
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- SIOPWRGD
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- SIOS3
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- SIOS5
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- SIOSCI
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- SPI1
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- SPI1ABR
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- SPI1CS1
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- SPI1WP
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- SPI2
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- SPI2CS1
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- SPI2CS2
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- TACH0
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- TACH1
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- TACH10
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- TACH11
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- TACH12
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- TACH13
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- TACH14
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- TACH15
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- TACH2
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- TACH3
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- TACH4
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- TACH5
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- TACH6
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- TACH7
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- TACH8
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- TACH9
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- THRU0
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- THRU1
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- THRU2
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- THRU3
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- TXD1
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- TXD2
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- TXD3
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- TXD4
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- UART10
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- UART11
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- UART12
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- UART13
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- UART6
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- UART7
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- UART8
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- UART9
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- USB11BHID
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- USB2AD
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- USB2AH
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- USB2AHP
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- USB2BD
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- USB2BH
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- USBAD
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- USBADP
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- VB
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- VGAHS
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- VGAVS
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- WDTRST1
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- WDTRST2
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- WDTRST3
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- WDTRST4
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groups:
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enum:
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- ADC0
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- ADC1
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- ADC10
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- ADC11
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- ADC12
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- ADC13
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- ADC14
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- ADC15
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- ADC2
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- ADC3
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- ADC4
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- ADC5
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- ADC6
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- ADC7
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- ADC8
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- ADC9
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- BMCINT
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- EMMCG1
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- EMMCG4
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- EMMCG8
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- ESPI
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- ESPIALT
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- FSI1
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- FSI2
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- FWQSPI
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- FWSPIABR
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- FWSPID
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- FWSPIWP
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- GPIT0
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- GPIT1
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- GPIT2
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- GPIT3
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- GPIT4
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- GPIT5
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- GPIT6
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- GPIT7
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- GPIU0
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- GPIU1
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- GPIU2
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- GPIU3
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- GPIU4
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- GPIU5
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- GPIU6
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- GPIU7
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- HVI3C3
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- HVI3C4
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- I2C1
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- I2C10
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- I2C11
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- I2C12
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- I2C13
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- I2C14
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- I2C15
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- I2C16
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- I2C2
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- I2C3
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- I2C4
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- I2C5
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- I2C6
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- I2C7
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- I2C8
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- I2C9
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- I3C1
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- I3C2
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- I3C3
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- I3C4
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- I3C5
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- I3C6
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- JTAGM
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- LHPD
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- LHSIRQ
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- LPC
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- LPCHC
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- LPCPD
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- LPCPME
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- LPCSMI
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- LSIRQ
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- MACLINK1
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- MACLINK2
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- MACLINK3
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- MACLINK4
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- MDIO1
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- MDIO2
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- MDIO3
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- MDIO4
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- NCSI3
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- NCSI4
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- NCTS1
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- NCTS2
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- NCTS3
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- NCTS4
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- NDCD1
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- NDCD2
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- NDCD3
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- NDCD4
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- NDSR1
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- NDSR2
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- NDSR3
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- NDSR4
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- NDTR1
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- NDTR2
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- NDTR3
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- NDTR4
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- NRI1
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- NRI2
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- NRI3
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- NRI4
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- NRTS1
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- NRTS2
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- NRTS3
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- NRTS4
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- OSCCLK
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- PCIERC1
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- PEWAKE
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- PWM0
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- PWM1
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- PWM10G0
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- PWM10G1
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- PWM11G0
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- PWM11G1
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- PWM12G0
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- PWM12G1
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- PWM13G0
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- PWM13G1
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- PWM14G0
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- PWM14G1
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- PWM15G0
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- PWM15G1
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- PWM2
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- PWM3
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- PWM4
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- PWM5
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- PWM6
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- PWM7
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- PWM8G0
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- PWM8G1
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- PWM9G0
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- PWM9G1
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- QSPI1
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- QSPI2
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- RGMII1
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- RGMII2
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- RGMII3
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- RGMII4
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- RMII1
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- RMII2
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- RMII3
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- RMII4
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- RXD1
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- RXD2
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- RXD3
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- RXD4
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- SALT1
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- SALT10G0
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- SALT10G1
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- SALT11G0
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- SALT11G1
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- SALT12G0
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- SALT12G1
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- SALT13G0
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- SALT13G1
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- SALT14G0
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- SALT14G1
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- SALT15G0
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- SALT15G1
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- SALT16G0
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- SALT16G1
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- SALT2
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- SALT3
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- SALT4
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- SALT5
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- SALT6
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- SALT7
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- SALT8
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- SALT9G0
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- SALT9G1
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- SD1
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- SD2
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- SD3
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- SGPM1
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- SGPM2
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- SGPS1
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- SGPS2
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- SIOONCTRL
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- SIOPBI
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- SIOPBO
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- SIOPWREQ
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- SIOPWRGD
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- SIOS3
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- SIOS5
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- SIOSCI
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- SPI1
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- SPI1ABR
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- SPI1CS1
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- SPI1WP
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- SPI2
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- SPI2CS1
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- SPI2CS2
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- TACH0
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- TACH1
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- TACH10
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- TACH11
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- TACH12
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- TACH13
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- TACH14
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- TACH15
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- TACH2
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- TACH3
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- TACH4
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- TACH5
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- TACH6
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- TACH7
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- TACH8
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- TACH9
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- THRU0
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- THRU1
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- THRU2
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- THRU3
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- TXD1
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- TXD2
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- TXD3
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- TXD4
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- UART10
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- UART11
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- UART12G0
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- UART12G1
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- UART13G0
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- UART13G1
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- UART6
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- UART7
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- UART8
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- UART9
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- USBA
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- USBB
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- VB
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- VGAHS
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- VGAVS
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- WDTRST1
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- WDTRST2
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- WDTRST3
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- WDTRST4
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pins: true
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bias-disable: true
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allOf:
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- $ref: pinctrl.yaml#
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required:
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- compatible
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examples:
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- |
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syscon: scu@1e6e2000 {
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compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
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reg = <0x1e6e2000 0xf6c>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1e6e2000 0x1000>;
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pinctrl: pinctrl {
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compatible = "aspeed,ast2600-pinctrl";
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pinctrl_pwm10g1_default: pwm10g1_default {
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function = "PWM10";
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groups = "PWM10G1";
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};
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pinctrl_gpioh0_unbiased_default: gpioh0 {
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pins = "A18";
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bias-disable;
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};
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};
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};
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