Files
linux/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml
Linus Torvalds a110f94267 Merge tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
 "The technical details below. For me the CIX Semi and Axis
  Communications ARTPEC-9 SoCs were the most interesting new drivers in
  this merge window.

  Core changes:

   - Handle per-direction skew control in the generic pin config

   - Drop the pointless subsystem boilerplate banner message during
     boot. Less noise in the console. It's available as debug message if
     someone really want it

  New drivers:

   - Samsung Exynos 8890 SoC support

   - Samsung Exynos derived Axis Communications ARTPEC-9 SoC support.
     These guys literally live next door to me, ARTPEC spells out "Axis
     Real-Time Picture Encoding Chip" and is tailored for camera image
     streams and is something they have evolved for a quarter of a
     century

   - Mediatek MT6878 SoC support

   - Qualcomm Glymur PMIC support (mostly just compatible strings)

   - Qualcomm Kaanapali SoC TLMM support

   - Microchip pic64gx "gpio2" SoC support

   - Microchip Polarfire "iomux0" SoC support

   - CIX Semiconductors SKY1 SoC support

   - Rockchip RK3506 SoC support

   - Airhoa AN7583 chip support

  Improvements:

   - Improvements for ST Microelectronics STM32 handling of skew
     settings so input and output can have different skew settings

   - A whole bunch of device tree binding cleanups: Marvell Armada and
     Berlin, Actions Semiconductor S700 and S900, Broadcom Northstar 2
     (NS2), Bitmain BM1880 and Spreadtrum SC9860 are moved over to
     schema"

* tag 'pinctrl-v6.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  pinctrl: add CONFIG_OF dependencies for microchip drivers
  pinctrl: starfive: use dynamic GPIO base allocation
  pinctrl: single: Fix incorrect type for error return variable
  MAINTAINERS: Change Linus Walleij mail address
  pinctrl: cix: Fix obscure dependency
  dt-bindings: pinctrl: cix,sky1-pinctrl: Drop duplicate newline
  dt-bindings: pinctrl: aspeed,ast2600-pinctrl: Add PCIe RC PERST# group
  pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data
  pinctrl: airoha: fix pinctrl function mismatch issue
  pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()
  pinctrl: intel: Export intel_gpio_add_pin_ranges()
  pinctrl: renesas: rzg2l: Refactor OEN register PWPR handling
  pinctrl: airoha: convert comma to semicolon
  pinctrl: elkhartlake: Switch to INTEL_GPP() macro
  pinctrl: cherryview: Switch to INTEL_GPP() macro
  pinctrl: emmitsburg: Switch to INTEL_GPP() macro
  pinctrl: denverton: Switch to INTEL_GPP() macro
  pinctrl: cedarfork: Switch to INTEL_GPP() macro
  pinctrl: airoha: add support for Airoha AN7583 PINs
  dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller
  ...
2025-12-09 06:45:00 +09:00

151 lines
4.6 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm MSM8960 TLMM pin controller
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Krzysztof Kozlowski <krzk@kernel.org>
description:
Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC.
properties:
compatible:
const: qcom,msm8960-pinctrl
reg:
maxItems: 1
interrupts:
maxItems: 1
gpio-reserved-ranges:
minItems: 1
maxItems: 76
gpio-line-names:
maxItems: 152
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-msm8960-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-msm8960-tlmm-state"
additionalProperties: false
$defs:
qcom-msm8960-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
description:
List of gpio pins affected by the properties specified in this
subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-1])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd,
sdc3_data ]
minItems: 1
maxItems: 36
function:
description:
Specify the alternative function to be configured for the specified
pins.
enum: [ gpio, audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2,
codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking,
gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a,
gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, gp_pdm_0b,
gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gsbi1,
gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n,
gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,
gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l,
gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l,
gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11,
gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, gsbi11_spi_cs2a_n,
gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, gsbi12, hdmi_cec,
hdmi_ddc_clock, hdmi_ddc_data, hdmi_hot_plug_detect, hsic,
mdp_vsync, mi2s, mic_i2s, pmb_clk, pmb_ext_ctrl, ps_hold,
rpm_wdog, sdc2, sdc4, sdc5, slimbus1, slimbus2, spkr_i2s,
ssbi1, ssbi2, ssbi_ext_gps, ssbi_pmic2, ssbi_qpa1, ssbi_ts,
tsif1, tsif2, ts_eoc, usb_fs1, usb_fs1_oe, usb_fs1_oe_n,
usb_fs2, usb_fs2_oe, usb_fs2_oe_n, vfe_camif_timer1_a,
vfe_camif_timer1_b, vfe_camif_timer2, vfe_camif_timer3_a,
vfe_camif_timer3_b, vfe_camif_timer4_a, vfe_camif_timer4_b,
vfe_camif_timer4_c, vfe_camif_timer5_a, vfe_camif_timer5_b,
vfe_camif_timer6_a, vfe_camif_timer6_b, vfe_camif_timer6_c,
vfe_camif_timer7_a, vfe_camif_timer7_b, vfe_camif_timer7_c,
wlan ]
required:
- pins
allOf:
- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
tlmm: pinctrl@800000 {
compatible = "qcom,msm8960-pinctrl";
reg = <0x800000 0x4000>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&tlmm 0 0 152>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
spi1-default-state {
mosi-pins {
pins = "gpio6";
function = "gsbi1";
drive-strength = <12>;
bias-disable;
};
miso-pins {
pins = "gpio7";
function = "gsbi1";
drive-strength = <12>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "gpio";
drive-strength = <12>;
bias-disable;
output-low;
};
clk-pins {
pins = "gpio9";
function = "gsbi1";
drive-strength = <12>;
bias-disable;
};
};
};