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Expand the zl3073x_out structure to cache all output-related hardware registers, including divisors, widths, embedded-sync parameters and phase compensation. Modify zl3073x_out_state_fetch() to read and populate all these new fields at once, including zero-divisor checks. Refactor all dpll "getter" functions in dpll.c to read from this new cached state instead of performing direct register access. Introduce a new function, zl3073x_out_state_set(), to handle writing changes back to the hardware. This function compares the provided state with the current cached state and writes *only* the modified register values via a single mailbox sequence before updating the local cache. Refactor all dpll "setter" functions to modify a local copy of the output state and then call zl3073x_out_state_set() to commit the changes. This change centralizes all output-related register I/O into out.c, significantly reduces bus traffic, and simplifies the logic in dpll.c. Reviewed-by: Petr Oros <poros@redhat.com> Tested-by: Prathosh Satish <Prathosh.Satish@microchip.com> Signed-off-by: Ivan Vecera <ivecera@redhat.com> Link: https://patch.msgid.link/20251113074105.141379-6-ivecera@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
158 lines
4.1 KiB
C
158 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/bitfield.h>
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#include <linux/cleanup.h>
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#include <linux/dev_printk.h>
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#include <linux/string.h>
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#include <linux/string_choices.h>
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#include <linux/types.h>
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#include "core.h"
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#include "out.h"
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/**
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* zl3073x_out_state_fetch - fetch output state from hardware
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* @zldev: pointer to zl3073x_dev structure
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* @index: output index to fetch state for
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*
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* Function fetches state of the given output from hardware and stores it
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* for later use.
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*
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* Return: 0 on success, <0 on error
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*/
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int zl3073x_out_state_fetch(struct zl3073x_dev *zldev, u8 index)
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{
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struct zl3073x_out *out = &zldev->out[index];
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int rc;
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/* Read output configuration */
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rc = zl3073x_read_u8(zldev, ZL_REG_OUTPUT_CTRL(index), &out->ctrl);
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if (rc)
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return rc;
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dev_dbg(zldev->dev, "OUT%u is %s and connected to SYNTH%u\n", index,
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str_enabled_disabled(zl3073x_out_is_enabled(out)),
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zl3073x_out_synth_get(out));
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guard(mutex)(&zldev->multiop_lock);
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/* Read output configuration */
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rc = zl3073x_mb_op(zldev, ZL_REG_OUTPUT_MB_SEM, ZL_OUTPUT_MB_SEM_RD,
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ZL_REG_OUTPUT_MB_MASK, BIT(index));
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if (rc)
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return rc;
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/* Read output mode */
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rc = zl3073x_read_u8(zldev, ZL_REG_OUTPUT_MODE, &out->mode);
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if (rc)
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return rc;
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dev_dbg(zldev->dev, "OUT%u has signal format 0x%02x\n", index,
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zl3073x_out_signal_format_get(out));
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/* Read output divisor */
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rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_DIV, &out->div);
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if (rc)
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return rc;
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if (!out->div) {
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dev_err(zldev->dev, "Zero divisor for OUT%u got from device\n",
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index);
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return -EINVAL;
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}
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dev_dbg(zldev->dev, "OUT%u divisor: %u\n", index, out->div);
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/* Read output width */
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rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_WIDTH, &out->width);
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if (rc)
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return rc;
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rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_ESYNC_PERIOD,
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&out->esync_n_period);
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if (rc)
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return rc;
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if (!out->esync_n_period) {
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dev_err(zldev->dev,
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"Zero esync divisor for OUT%u got from device\n",
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index);
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return -EINVAL;
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}
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rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_ESYNC_WIDTH,
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&out->esync_n_width);
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if (rc)
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return rc;
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rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_PHASE_COMP,
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&out->phase_comp);
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if (rc)
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return rc;
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return rc;
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}
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/**
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* zl3073x_out_state_get - get current output state
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* @zldev: pointer to zl3073x_dev structure
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* @index: output index to get state for
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*
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* Return: pointer to given output state
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*/
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const struct zl3073x_out *zl3073x_out_state_get(struct zl3073x_dev *zldev,
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u8 index)
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{
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return &zldev->out[index];
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}
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int zl3073x_out_state_set(struct zl3073x_dev *zldev, u8 index,
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const struct zl3073x_out *out)
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{
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struct zl3073x_out *dout = &zldev->out[index];
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int rc;
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guard(mutex)(&zldev->multiop_lock);
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/* Read output configuration into mailbox */
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rc = zl3073x_mb_op(zldev, ZL_REG_OUTPUT_MB_SEM, ZL_OUTPUT_MB_SEM_RD,
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ZL_REG_OUTPUT_MB_MASK, BIT(index));
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if (rc)
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return rc;
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/* Update mailbox with changed values */
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if (dout->div != out->div)
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rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_DIV, out->div);
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if (!rc && dout->width != out->width)
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rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_WIDTH, out->width);
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if (!rc && dout->esync_n_period != out->esync_n_period)
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rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_ESYNC_PERIOD,
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out->esync_n_period);
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if (!rc && dout->esync_n_width != out->esync_n_width)
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rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_ESYNC_WIDTH,
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out->esync_n_width);
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if (!rc && dout->mode != out->mode)
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rc = zl3073x_write_u8(zldev, ZL_REG_OUTPUT_MODE, out->mode);
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if (!rc && dout->phase_comp != out->phase_comp)
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rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_PHASE_COMP,
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out->phase_comp);
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if (rc)
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return rc;
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/* Commit output configuration */
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rc = zl3073x_mb_op(zldev, ZL_REG_OUTPUT_MB_SEM, ZL_OUTPUT_MB_SEM_WR,
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ZL_REG_OUTPUT_MB_MASK, BIT(index));
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if (rc)
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return rc;
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/* After successful commit store new state */
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dout->div = out->div;
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dout->width = out->width;
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dout->esync_n_period = out->esync_n_period;
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dout->esync_n_width = out->esync_n_width;
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dout->mode = out->mode;
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dout->phase_comp = out->phase_comp;
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return 0;
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}
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