Cruise Hung cdd9b2d7e4 drm/amd/display: Always update divider settings for DP tunnel ...

[Why]
When transitioning from 640x480 at RBRx1 to HBR3x1,
both output pixel mode and pixel rate divider should update.
The needs_divider_update flag was only for 8b10b and 128b132b transition.

[How]
For DP tunneling, always update divider settings.

Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Cruise Hung <Cruise.Hung@amd.com>
Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2026-01-10 14:21:53 -05:00

..

link_dp_cts.c

drm/amd/display: Always update divider settings for DP tunnel

2026-01-10 14:21:53 -05:00

link_dp_cts.h

drm/amd/display: Rename header file link.h to link_service.h

2025-09-15 16:57:29 -04:00

link_dp_trace.c

drm/amd/display: Adjust some includes used by display

2024-04-12 00:34:43 -04:00

link_dp_trace.h

drm/amd/display: Rename header file link.h to link_service.h

2025-09-15 16:57:29 -04:00