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6ca1701cec
Using pmu counters for usage stats. This enables dynamic frequency scaling on all of the currently supported Tegra gpus. The register offsets are valid for gk20a, gm20b, gp10b, and gv11b. If support is added for ga10b, this will need rearchitected. Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> [fixed tab alignment in gk20a_devfreq_target()] Signed-off-by: Lyude Paul <lyude@redhat.com> Link: https://lore.kernel.org/r/20250906-gk20a-devfreq-v2-1-0217f53ee355@gmail.com
19 lines
355 B
C
19 lines
355 B
C
/* SPDX-License-Identifier: MIT */
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#ifndef __NVKM_CLK_GP10B_H__
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#define __NVKM_CLK_GP10B_H__
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struct gp10b_clk {
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/* currently applied parameters */
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struct nvkm_clk base;
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struct gk20a_devfreq *devfreq;
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struct clk *clk;
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u32 rate;
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/* new parameters to apply */
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u32 new_rate;
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};
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#define gp10b_clk(p) container_of((p), struct gp10b_clk, base)
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#endif
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