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5dfc898969
If the primary GT is disabled, skip the check for this workaround (which only applies to dgpu platforms where the primary GT cannot be NULL). Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com> Link: https://lore.kernel.org/r/20251013200944.2499947-44-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
20 lines
437 B
C
20 lines
437 B
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#include "intel_display_core.h"
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#include "intel_display_wa.h"
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#include "xe_device.h"
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#include "xe_wa.h"
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#include <generated/xe_wa_oob.h>
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bool intel_display_needs_wa_16023588340(struct intel_display *display)
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{
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struct xe_device *xe = to_xe_device(display->drm);
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struct xe_gt *wa_gt = xe_root_mmio_gt(xe);
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return wa_gt && XE_GT_WA(wa_gt, 16023588340);
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}
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