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The initial plane parent interface ->alloc_obj hook no longer needs the crtc for anything. Pass struct drm_device instead. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/7a40381be6d98dc0916a5447be5dd6cba86cfd0a.1765812266.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
190 lines
4.8 KiB
C
190 lines
4.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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/* for ioread64 */
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <drm/intel/display_parent_interface.h>
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#include "regs/xe_gtt_defs.h"
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#include "xe_ggtt.h"
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#include "xe_mmio.h"
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#include "i915_vma.h"
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#include "intel_crtc.h"
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#include "intel_display_regs.h"
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#include "intel_display_types.h"
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#include "intel_fb.h"
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#include "intel_fb_pin.h"
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#include "xe_bo.h"
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#include "xe_vram_types.h"
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#include "xe_wa.h"
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#include <generated/xe_device_wa_oob.h>
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/* Early xe has no irq */
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static void xe_initial_plane_vblank_wait(struct drm_crtc *_crtc)
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{
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struct intel_crtc *crtc = to_intel_crtc(_crtc);
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struct xe_device *xe = to_xe_device(crtc->base.dev);
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struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));
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u32 timestamp;
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int ret;
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timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp);
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ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false);
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if (ret < 0)
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drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret);
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}
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static struct xe_bo *
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initial_plane_bo(struct xe_device *xe,
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struct intel_initial_plane_config *plane_config)
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{
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struct xe_tile *tile0 = xe_device_get_root_tile(xe);
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struct xe_bo *bo;
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resource_size_t phys_base;
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u32 base, size, flags;
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u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
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if (plane_config->size == 0)
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return NULL;
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flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT;
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base = round_down(plane_config->base, page_size);
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if (IS_DGFX(xe)) {
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u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base);
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if (!(pte & XE_GGTT_PTE_DM)) {
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drm_err(&xe->drm,
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"Initial plane programming missing DM bit\n");
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return NULL;
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}
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phys_base = pte & ~(page_size - 1);
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flags |= XE_BO_FLAG_VRAM0;
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/*
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* We don't currently expect this to ever be placed in the
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* stolen portion.
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*/
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if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) {
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drm_err(&xe->drm,
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"Initial plane programming using invalid range, phys_base=%pa\n",
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&phys_base);
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return NULL;
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}
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drm_dbg(&xe->drm,
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"Using phys_base=%pa, based on initial plane programming\n",
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&phys_base);
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} else {
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struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
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if (!stolen)
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return NULL;
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phys_base = base;
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flags |= XE_BO_FLAG_STOLEN;
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if (XE_DEVICE_WA(xe, 22019338487_display))
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return NULL;
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/*
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* If the FB is too big, just don't use it since fbdev is not very
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* important and we should probably use that space with FBC or other
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* features.
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*/
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if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
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plane_config->size * 2 >> PAGE_SHIFT >= stolen->size)
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return NULL;
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}
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size = round_up(plane_config->base + plane_config->size,
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page_size);
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size -= base;
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bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base,
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ttm_bo_type_kernel, flags, 0, false);
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if (IS_ERR(bo)) {
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drm_dbg(&xe->drm,
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"Failed to create bo phys_base=%pa size %u with flags %x: %li\n",
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&phys_base, size, flags, PTR_ERR(bo));
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return NULL;
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}
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return bo;
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}
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static struct drm_gem_object *
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xe_alloc_initial_plane_obj(struct drm_device *drm,
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struct intel_initial_plane_config *plane_config)
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{
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struct xe_device *xe = to_xe_device(drm);
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struct drm_mode_fb_cmd2 mode_cmd = { 0 };
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struct drm_framebuffer *fb = &plane_config->fb->base;
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struct xe_bo *bo;
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mode_cmd.pixel_format = fb->format->format;
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mode_cmd.width = fb->width;
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mode_cmd.height = fb->height;
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mode_cmd.pitches[0] = fb->pitches[0];
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mode_cmd.modifier[0] = fb->modifier;
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mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
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bo = initial_plane_bo(xe, plane_config);
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if (!bo)
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return NULL;
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if (intel_framebuffer_init(to_intel_framebuffer(fb),
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&bo->ttm.base, fb->format, &mode_cmd)) {
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drm_dbg_kms(&xe->drm, "intel fb init failed\n");
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goto err_bo;
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}
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/* Reference handed over to fb */
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xe_bo_put(bo);
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return &bo->ttm.base;
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err_bo:
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xe_bo_unpin_map_no_vm(bo);
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return NULL;
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}
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static int
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xe_initial_plane_setup(struct drm_plane_state *_plane_state,
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struct intel_initial_plane_config *plane_config,
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struct drm_framebuffer *fb,
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struct i915_vma *_unused)
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{
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struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state);
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struct i915_vma *vma;
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vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt,
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0, 0, 0, false, &plane_state->flags);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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plane_state->ggtt_vma = vma;
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plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);
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plane_config->vma = vma;
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return 0;
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}
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static void xe_plane_config_fini(struct intel_initial_plane_config *plane_config)
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{
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}
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const struct intel_display_initial_plane_interface xe_display_initial_plane_interface = {
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.vblank_wait = xe_initial_plane_vblank_wait,
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.alloc_obj = xe_alloc_initial_plane_obj,
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.setup = xe_initial_plane_setup,
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.config_fini = xe_plane_config_fini,
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};
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