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49a4983384
Expose individual VRAM temperature attributes. Update Xe hwmon documentation for this entry. v2: - Avoid using default switch case for VRAM individual temperatures. - Append labels with VRAM channel number. - Update kernel version in Xe hwmon documentation. v3: - Add missing brackets in Xe hwmon documentation from VRAM channel sysfs. - Reorder BMG_VRAM_TEMPERATURE_N macro in xe_pcode_regs.h. - Add api to check if VRAM is available on the channel. v4: - Improve VRAM label handling to eliminate temp variable by introducing a dedicated array vram_label in xe_hwmon_thermal_info. - Remove a magic number. - Change the label from vram_X to vram_ch_X. v5: - Address review comments from Raag. - Change vram to VRAM in commit title and subject. - Refactor BMG_VRAM_TEMPERATURE_N macro. - Refactor is_vram_ch_available(). - Rephrase a comment. - Check individual VRAM temperature limits in addition to VRAM availability in xe_hwmon_temp_is_visible. (Raag) - Move VRAM label change out of this patch. v6: - Use in_range() for VRAM_N index check instead of if check. (Raag) - Minor aesthetic changes. Signed-off-by: Karthik Poosa <karthik.poosa@intel.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Link: https://patch.msgid.link/20260112203521.1014388-5-karthik.poosa@intel.com Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
31 lines
1008 B
C
31 lines
1008 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2024 Intel Corporation
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*/
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#ifndef _XE_PCODE_REGS_H_
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#define _XE_PCODE_REGS_H_
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#include "regs/xe_reg_defs.h"
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/*
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* This file contains addresses of PCODE registers visible through GT MMIO space.
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*/
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#define PVC_GT0_PACKAGE_ENERGY_STATUS XE_REG(0x281004)
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#define PVC_GT0_PACKAGE_RAPL_LIMIT XE_REG(0x281008)
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#define PVC_GT0_PACKAGE_POWER_SKU_UNIT XE_REG(0x281068)
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#define PVC_GT0_PLATFORM_ENERGY_STATUS XE_REG(0x28106c)
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#define PVC_GT0_PACKAGE_POWER_SKU XE_REG(0x281080)
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#define BMG_FAN_1_SPEED XE_REG(0x138140)
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#define BMG_FAN_2_SPEED XE_REG(0x138170)
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#define BMG_FAN_3_SPEED XE_REG(0x1381a0)
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#define BMG_VRAM_TEMPERATURE_N(n) XE_REG(0x138260 + ((n) * (sizeof(u32))))
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#define BMG_VRAM_TEMPERATURE XE_REG(0x1382c0)
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#define TEMP_MASK_VRAM_N REG_GENMASK(30, 8)
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#define TEMP_SIGN_MASK REG_BIT(31)
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#define BMG_PACKAGE_TEMPERATURE XE_REG(0x138434)
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#endif /* _XE_PCODE_REGS_H_ */
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