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def675cf3f
All MERT catastrophic errors but VF's LMTT fault are serious, so we shouldn't limit our handling only to print debug messages. Change CATERR message to error level and then declare the device as wedged to match expectation from the design document. For the LMTT faults, add a note about adding tracking of this unexpected VF activity. While at it, rename register fields defnitions to match the BSpec. Also drop trailing include guard name from the regs.h file. BSpec: 74625 Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lukasz Laguna <lukasz.laguna@intel.com> Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com> Link: https://patch.msgid.link/20260112183716.28700-1-michal.wajdeczko@intel.com
119 lines
2.9 KiB
C
119 lines
2.9 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright(c) 2025, Intel Corporation. All rights reserved.
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*/
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#include "regs/xe_irq_regs.h"
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#include "regs/xe_mert_regs.h"
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#include "xe_device.h"
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#include "xe_mert.h"
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#include "xe_mmio.h"
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#include "xe_sriov_printk.h"
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#include "xe_tile.h"
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/**
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* xe_mert_init_early() - Initialize MERT data
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* @xe: the &xe_device with MERT to init
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*/
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void xe_mert_init_early(struct xe_device *xe)
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{
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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struct xe_mert *mert = &tile->mert;
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spin_lock_init(&mert->lock);
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init_completion(&mert->tlb_inv_done);
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}
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/**
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* xe_mert_invalidate_lmtt() - Invalidate MERT LMTT
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* @xe: the &xe_device with MERT
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*
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* Trigger invalidation of the MERT LMTT and wait for completion.
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*
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* Return: 0 on success or -ETIMEDOUT in case of a timeout.
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*/
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int xe_mert_invalidate_lmtt(struct xe_device *xe)
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{
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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struct xe_mert *mert = &tile->mert;
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const long timeout = HZ / 4;
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unsigned long flags;
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xe_assert(xe, xe_device_has_mert(xe));
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spin_lock_irqsave(&mert->lock, flags);
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if (!mert->tlb_inv_triggered) {
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mert->tlb_inv_triggered = true;
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reinit_completion(&mert->tlb_inv_done);
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xe_mmio_write32(&tile->mmio, MERT_TLB_INV_DESC_A, MERT_TLB_INV_DESC_A_VALID);
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}
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spin_unlock_irqrestore(&mert->lock, flags);
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if (!wait_for_completion_timeout(&mert->tlb_inv_done, timeout))
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return -ETIMEDOUT;
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return 0;
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}
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static void mert_handle_cat_error(struct xe_device *xe)
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{
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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u32 reg_val, vfid, code;
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reg_val = xe_mmio_read32(&tile->mmio, MERT_TLB_CT_INTR_ERR_ID_PORT);
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if (!reg_val)
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return;
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xe_mmio_write32(&tile->mmio, MERT_TLB_CT_INTR_ERR_ID_PORT, 0);
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vfid = FIELD_GET(CATERR_VFID, reg_val);
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code = FIELD_GET(CATERR_CODES, reg_val);
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switch (code) {
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case CATERR_NO_ERROR:
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break;
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case CATERR_UNMAPPED_GGTT:
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xe_sriov_err(xe, "MERT: CAT_ERR: Access to an unmapped GGTT!\n");
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xe_device_declare_wedged(xe);
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break;
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case CATERR_LMTT_FAULT:
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xe_sriov_dbg(xe, "MERT: CAT_ERR: VF%u LMTT fault!\n", vfid);
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/* XXX: track/report malicious VF activity */
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break;
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default:
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xe_sriov_err(xe, "MERT: Unexpected CAT_ERR code=%#x!\n", code);
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xe_device_declare_wedged(xe);
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break;
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}
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}
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/**
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* xe_mert_irq_handler - Handler for MERT interrupts
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* @xe: the &xe_device
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* @master_ctl: interrupt register
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*
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* Handle interrupts generated by MERT.
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*/
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void xe_mert_irq_handler(struct xe_device *xe, u32 master_ctl)
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{
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struct xe_tile *tile = xe_device_get_root_tile(xe);
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struct xe_mert *mert = &tile->mert;
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unsigned long flags;
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u32 reg_val;
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if (!(master_ctl & SOC_H2DMEMINT_IRQ))
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return;
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mert_handle_cat_error(xe);
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spin_lock_irqsave(&mert->lock, flags);
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if (mert->tlb_inv_triggered) {
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reg_val = xe_mmio_read32(&tile->mmio, MERT_TLB_INV_DESC_A);
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if (!(reg_val & MERT_TLB_INV_DESC_A_VALID)) {
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mert->tlb_inv_triggered = false;
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complete_all(&mert->tlb_inv_done);
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}
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}
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spin_unlock_irqrestore(&mert->lock, flags);
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}
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