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The ice Tx/Rx hotpath has a few statistics counters for tracking unexpected events. These values are stored as u64 but are not accumulated using the u64_stats API. This could result in load/tear stores on some architectures. Even some 64-bit architectures could have issues since the fields are not read or written using ACCESS_ONCE or READ_ONCE. A following change is going to refactor the stats accumulator code to use the u64_stats API for all of these stats, and to use u64_stats_read and u64_stats_inc properly to prevent load/store tears on all architectures. Using u64_stats_inc and the syncp pointer is slightly verbose and would be duplicated in a number of places in the Tx and Rx hot path. Add accessor macros for the cases where only a single stat value is touched at once. To keep lines short, also shorten the stats names and convert ice_txq_stats and ice_rxq_stats to struct_group. This will ease the transition to properly using the u64_stats API in the following change. Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
139 lines
4.2 KiB
C
139 lines
4.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2019, Intel Corporation. */
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#ifndef _ICE_TXRX_LIB_H_
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#define _ICE_TXRX_LIB_H_
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#include "ice.h"
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/**
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* ice_test_staterr - tests bits in Rx descriptor status and error fields
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* @status_err_n: Rx descriptor status_error0 or status_error1 bits
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* @stat_err_bits: value to mask
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*
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* This function does some fast chicanery in order to return the
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* value of the mask which is really only used for boolean tests.
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* The status_error_len doesn't need to be shifted because it begins
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* at offset zero.
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*/
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static inline bool
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ice_test_staterr(__le16 status_err_n, const u16 stat_err_bits)
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{
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return !!(status_err_n & cpu_to_le16(stat_err_bits));
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}
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/**
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* ice_is_non_eop - process handling of non-EOP buffers
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* @rx_ring: Rx ring being processed
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* @rx_desc: Rx descriptor for current buffer
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*
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* If the buffer is an EOP buffer, this function exits returning false,
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* otherwise return true indicating that this is in fact a non-EOP buffer.
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*/
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static inline bool
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ice_is_non_eop(const struct ice_rx_ring *rx_ring,
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const union ice_32b_rx_flex_desc *rx_desc)
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{
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/* if we are the last buffer then there is nothing else to do */
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#define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
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if (likely(ice_test_staterr(rx_desc->wb.status_error0, ICE_RXD_EOF)))
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return false;
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ice_stats_inc(rx_ring->ring_stats, rx_non_eop_descs);
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return true;
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}
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static inline __le64
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ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)
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{
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return cpu_to_le64(ICE_TX_DESC_DTYPE_DATA |
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(td_cmd << ICE_TXD_QW1_CMD_S) |
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(td_offset << ICE_TXD_QW1_OFFSET_S) |
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((u64)size << ICE_TXD_QW1_TX_BUF_SZ_S) |
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(td_tag << ICE_TXD_QW1_L2TAG1_S));
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}
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/**
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* ice_build_tstamp_desc - build Tx time stamp descriptor
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* @tx_desc: Tx LAN descriptor index
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* @tstamp: time stamp
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*
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* Return: Tx time stamp descriptor
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*/
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static inline __le32
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ice_build_tstamp_desc(u16 tx_desc, u32 tstamp)
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{
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return cpu_to_le32(FIELD_PREP(ICE_TXTIME_TX_DESC_IDX_M, tx_desc) |
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FIELD_PREP(ICE_TXTIME_STAMP_M, tstamp));
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}
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/**
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* ice_get_vlan_tci - get VLAN TCI from Rx flex descriptor
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* @rx_desc: Rx 32b flex descriptor with RXDID=2
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*
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* The OS and current PF implementation only support stripping a single VLAN tag
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* at a time, so there should only ever be 0 or 1 tags in the l2tag* fields. If
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* one is found return the tag, else return 0 to mean no VLAN tag was found.
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*/
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static inline u16
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ice_get_vlan_tci(const union ice_32b_rx_flex_desc *rx_desc)
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{
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u16 stat_err_bits;
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stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S);
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if (ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
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return le16_to_cpu(rx_desc->wb.l2tag1);
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stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS1_L2TAG2P_S);
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if (ice_test_staterr(rx_desc->wb.status_error1, stat_err_bits))
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return le16_to_cpu(rx_desc->wb.l2tag2_2nd);
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return 0;
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}
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/**
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* ice_xdp_ring_update_tail - Updates the XDP Tx ring tail register
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* @xdp_ring: XDP Tx ring
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*
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* This function updates the XDP Tx ring tail register.
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*/
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static inline void ice_xdp_ring_update_tail(struct ice_tx_ring *xdp_ring)
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{
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/* Force memory writes to complete before letting h/w
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* know there are new descriptors to fetch.
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*/
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wmb();
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writel_relaxed(xdp_ring->next_to_use, xdp_ring->tail);
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}
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/**
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* ice_set_rs_bit - set RS bit on last produced descriptor (one behind current NTU)
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* @xdp_ring: XDP ring to produce the HW Tx descriptors on
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*
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* returns index of descriptor that had RS bit produced on
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*/
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static inline u32 ice_set_rs_bit(const struct ice_tx_ring *xdp_ring)
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{
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u32 rs_idx = xdp_ring->next_to_use ? xdp_ring->next_to_use - 1 : xdp_ring->count - 1;
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struct ice_tx_desc *tx_desc;
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tx_desc = ICE_TX_DESC(xdp_ring, rs_idx);
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tx_desc->cmd_type_offset_bsz |=
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cpu_to_le64(ICE_TX_DESC_CMD_RS << ICE_TXD_QW1_CMD_S);
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return rs_idx;
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}
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void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res, u32 first_idx);
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int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring,
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bool frame);
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void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val);
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void
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ice_process_skb_fields(struct ice_rx_ring *rx_ring,
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union ice_32b_rx_flex_desc *rx_desc,
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struct sk_buff *skb);
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void
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ice_receive_skb(struct ice_rx_ring *rx_ring, struct sk_buff *skb, u16 vlan_tci);
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#endif /* !_ICE_TXRX_LIB_H_ */
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