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The new version of the hisilicon zip driver supports the hash join and gather features, as well as the data move feature (UDMA), including data copying and memory initialization functions.These features are registered to the uacce subsystem. Signed-off-by: Zhushuai Yin <yinzhushuai@huawei.com> Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
41 lines
1.0 KiB
C
41 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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#ifndef _UAPI_HISI_QM_H
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#define _UAPI_HISI_QM_H
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#include <linux/types.h>
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/**
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* struct hisi_qp_ctx - User data for hisi qp.
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* @id: qp_index return to user space
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* @qc_type: Accelerator algorithm type
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*/
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struct hisi_qp_ctx {
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__u16 id;
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__u16 qc_type;
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};
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/**
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* struct hisi_qp_info - User data for hisi qp.
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* @sqe_size: Submission queue element size
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* @sq_depth: The number of sqe
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* @cq_depth: The number of cqe
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* @reserved: Reserved data
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*/
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struct hisi_qp_info {
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__u32 sqe_size;
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__u16 sq_depth;
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__u16 cq_depth;
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__u64 reserved;
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};
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#define HISI_QM_API_VER_BASE "hisi_qm_v1"
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#define HISI_QM_API_VER2_BASE "hisi_qm_v2"
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#define HISI_QM_API_VER3_BASE "hisi_qm_v3"
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#define HISI_QM_API_VER5_BASE "hisi_qm_v5"
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/* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */
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#define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx)
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/* UACCE_CMD_QM_SET_QP_INFO: Set qp depth and BD size */
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#define UACCE_CMD_QM_SET_QP_INFO _IOWR('H', 11, struct hisi_qp_info)
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#endif
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