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Optimize the AES library with x86 AES-NI instructions. The relevant existing assembly functions, aesni_set_key(), aesni_enc(), and aesni_dec(), are a bit difficult to extract into the library: - They're coupled to the code for the AES modes. - They operate on struct crypto_aes_ctx. The AES library now uses different structs. - They assume the key is 16-byte aligned. The AES library only *prefers* 16-byte alignment; it doesn't require it. Moreover, they're not all that great in the first place: - They use unrolled loops, which isn't a great choice on x86. - They use the 'aeskeygenassist' instruction, which is unnecessary, is slow on Intel CPUs, and forces the loop to be unrolled. - They have special code for AES-192 key expansion, despite that being kind of useless. AES-128 and AES-256 are the ones used in practice. These are small functions anyway. Therefore, I opted to just write replacements of these functions for the library. They address all the above issues. Acked-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20260112192035.10427-18-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
262 lines
7.0 KiB
ArmAsm
262 lines
7.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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//
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// AES block cipher using AES-NI instructions
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//
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// Copyright 2026 Google LLC
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//
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// The code in this file supports 32-bit and 64-bit CPUs, and it doesn't require
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// AVX. It does use up to SSE4.1, which all CPUs with AES-NI have.
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#include <linux/linkage.h>
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.section .rodata
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#ifdef __x86_64__
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#define RODATA(label) label(%rip)
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#else
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#define RODATA(label) label
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#endif
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// A mask for pshufb that extracts the last dword, rotates it right by 8
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// bits, and copies the result to all four dwords.
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.p2align 4
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.Lmask:
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.byte 13, 14, 15, 12, 13, 14, 15, 12, 13, 14, 15, 12, 13, 14, 15, 12
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// The AES round constants, used during key expansion
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.Lrcon:
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.long 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36
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.text
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// Transform four dwords [a0, a1, a2, a3] in \a into
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// [a0, a0^a1, a0^a1^a2, a0^a1^a2^a3]. \tmp is a temporary xmm register.
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//
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// Note: this could be done in four instructions, shufps + pxor + shufps + pxor,
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// if the temporary register were zero-initialized ahead of time. We instead do
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// it in an easier-to-understand way that doesn't require zero-initialization
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// and avoids the unusual shufps instruction. movdqa is usually "free" anyway.
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.macro _prefix_sum a, tmp
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movdqa \a, \tmp // [a0, a1, a2, a3]
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pslldq $4, \a // [0, a0, a1, a2]
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pxor \tmp, \a // [a0, a0^a1, a1^a2, a2^a3]
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movdqa \a, \tmp
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pslldq $8, \a // [0, 0, a0, a0^a1]
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pxor \tmp, \a // [a0, a0^a1, a0^a1^a2, a0^a1^a2^a3]
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.endm
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.macro _gen_round_key a, b
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// Compute four copies of rcon[i] ^ SubBytes(ror32(w, 8)), where w is
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// the last dword of the previous round key (given in \b).
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//
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// 'aesenclast src, dst' does dst = src XOR SubBytes(ShiftRows(dst)).
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// It is used here solely for the SubBytes and the XOR. The ShiftRows
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// is a no-op because all four columns are the same here.
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//
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// Don't use the 'aeskeygenassist' instruction, since:
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// - On most Intel CPUs it is microcoded, making it have a much higher
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// latency and use more execution ports than 'aesenclast'.
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// - It cannot be used in a loop, since it requires an immediate.
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// - It doesn't do much more than 'aesenclast' in the first place.
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movdqa \b, %xmm2
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pshufb MASK, %xmm2
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aesenclast RCON, %xmm2
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// XOR in the prefix sum of the four dwords of \a, which is the
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// previous round key (AES-128) or the first round key in the previous
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// pair of round keys (AES-256). The result is the next round key.
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_prefix_sum \a, tmp=%xmm3
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pxor %xmm2, \a
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// Store the next round key to memory. Also leave it in \a.
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movdqu \a, (RNDKEYS)
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.endm
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.macro _aes_expandkey_aesni is_aes128
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#ifdef __x86_64__
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// Arguments
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.set RNDKEYS, %rdi
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.set INV_RNDKEYS, %rsi
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.set IN_KEY, %rdx
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// Other local variables
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.set RCON_PTR, %rcx
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.set COUNTER, %eax
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#else
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// Arguments, assuming -mregparm=3
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.set RNDKEYS, %eax
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.set INV_RNDKEYS, %edx
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.set IN_KEY, %ecx
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// Other local variables
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.set RCON_PTR, %ebx
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.set COUNTER, %esi
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#endif
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.set RCON, %xmm6
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.set MASK, %xmm7
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#ifdef __i386__
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push %ebx
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push %esi
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#endif
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.if \is_aes128
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// AES-128: the first round key is simply a copy of the raw key.
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movdqu (IN_KEY), %xmm0
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movdqu %xmm0, (RNDKEYS)
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.else
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// AES-256: the first two round keys are simply a copy of the raw key.
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movdqu (IN_KEY), %xmm0
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movdqu %xmm0, (RNDKEYS)
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movdqu 16(IN_KEY), %xmm1
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movdqu %xmm1, 16(RNDKEYS)
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add $32, RNDKEYS
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.endif
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// Generate the remaining round keys.
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movdqa RODATA(.Lmask), MASK
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.if \is_aes128
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lea RODATA(.Lrcon), RCON_PTR
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mov $10, COUNTER
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.Lgen_next_aes128_round_key:
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add $16, RNDKEYS
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movd (RCON_PTR), RCON
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pshufd $0x00, RCON, RCON
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add $4, RCON_PTR
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_gen_round_key %xmm0, %xmm0
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dec COUNTER
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jnz .Lgen_next_aes128_round_key
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.else
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// AES-256: only the first 7 round constants are needed, so instead of
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// loading each one from memory, just start by loading [1, 1, 1, 1] and
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// then generate the rest by doubling.
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pshufd $0x00, RODATA(.Lrcon), RCON
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pxor %xmm5, %xmm5 // All-zeroes
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mov $7, COUNTER
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.Lgen_next_aes256_round_key_pair:
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// Generate the next AES-256 round key: either the first of a pair of
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// two, or the last one.
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_gen_round_key %xmm0, %xmm1
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dec COUNTER
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jz .Lgen_aes256_round_keys_done
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// Generate the second AES-256 round key of the pair. Compared to the
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// first, there's no rotation and no XOR of a round constant.
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pshufd $0xff, %xmm0, %xmm2 // Get four copies of last dword
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aesenclast %xmm5, %xmm2 // Just does SubBytes
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_prefix_sum %xmm1, tmp=%xmm3
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pxor %xmm2, %xmm1
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movdqu %xmm1, 16(RNDKEYS)
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add $32, RNDKEYS
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paddd RCON, RCON // RCON <<= 1
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jmp .Lgen_next_aes256_round_key_pair
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.Lgen_aes256_round_keys_done:
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.endif
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// If INV_RNDKEYS is non-NULL, write the round keys for the Equivalent
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// Inverse Cipher to it. To do that, reverse the standard round keys,
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// and apply aesimc (InvMixColumn) to each except the first and last.
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test INV_RNDKEYS, INV_RNDKEYS
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jz .Ldone\@
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movdqu (RNDKEYS), %xmm0 // Last standard round key
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movdqu %xmm0, (INV_RNDKEYS) // => First inverse round key
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.if \is_aes128
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mov $9, COUNTER
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.else
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mov $13, COUNTER
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.endif
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.Lgen_next_inv_round_key\@:
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sub $16, RNDKEYS
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add $16, INV_RNDKEYS
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movdqu (RNDKEYS), %xmm0
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aesimc %xmm0, %xmm0
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movdqu %xmm0, (INV_RNDKEYS)
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dec COUNTER
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jnz .Lgen_next_inv_round_key\@
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movdqu -16(RNDKEYS), %xmm0 // First standard round key
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movdqu %xmm0, 16(INV_RNDKEYS) // => Last inverse round key
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.Ldone\@:
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#ifdef __i386__
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pop %esi
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pop %ebx
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#endif
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RET
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.endm
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// void aes128_expandkey_aesni(u32 rndkeys[], u32 *inv_rndkeys,
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// const u8 in_key[AES_KEYSIZE_128]);
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SYM_FUNC_START(aes128_expandkey_aesni)
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_aes_expandkey_aesni 1
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SYM_FUNC_END(aes128_expandkey_aesni)
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// void aes256_expandkey_aesni(u32 rndkeys[], u32 *inv_rndkeys,
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// const u8 in_key[AES_KEYSIZE_256]);
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SYM_FUNC_START(aes256_expandkey_aesni)
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_aes_expandkey_aesni 0
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SYM_FUNC_END(aes256_expandkey_aesni)
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.macro _aes_crypt_aesni enc
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#ifdef __x86_64__
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.set RNDKEYS, %rdi
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.set NROUNDS, %esi
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.set OUT, %rdx
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.set IN, %rcx
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#else
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// Assuming -mregparm=3
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.set RNDKEYS, %eax
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.set NROUNDS, %edx
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.set OUT, %ecx
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.set IN, %ebx // Passed on stack
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#endif
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#ifdef __i386__
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push %ebx
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mov 8(%esp), %ebx
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#endif
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// Zero-th round
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movdqu (IN), %xmm0
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movdqu (RNDKEYS), %xmm1
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pxor %xmm1, %xmm0
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// Normal rounds
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add $16, RNDKEYS
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dec NROUNDS
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.Lnext_round\@:
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movdqu (RNDKEYS), %xmm1
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.if \enc
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aesenc %xmm1, %xmm0
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.else
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aesdec %xmm1, %xmm0
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.endif
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add $16, RNDKEYS
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dec NROUNDS
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jne .Lnext_round\@
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// Last round
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movdqu (RNDKEYS), %xmm1
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.if \enc
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aesenclast %xmm1, %xmm0
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.else
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aesdeclast %xmm1, %xmm0
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.endif
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movdqu %xmm0, (OUT)
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#ifdef __i386__
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pop %ebx
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#endif
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RET
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.endm
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// void aes_encrypt_aesni(const u32 rndkeys[], int nrounds,
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// u8 out[AES_BLOCK_SIZE], const u8 in[AES_BLOCK_SIZE]);
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SYM_FUNC_START(aes_encrypt_aesni)
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_aes_crypt_aesni 1
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SYM_FUNC_END(aes_encrypt_aesni)
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// void aes_decrypt_aesni(const u32 inv_rndkeys[], int nrounds,
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// u8 out[AES_BLOCK_SIZE], const u8 in[AES_BLOCK_SIZE]);
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SYM_FUNC_START(aes_decrypt_aesni)
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_aes_crypt_aesni 0
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SYM_FUNC_END(aes_decrypt_aesni)
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