mirror of
https://github.com/torvalds/linux.git
synced 2026-04-21 08:13:56 -04:00
Fix an inconsistency between func_states_equal() and
collect_linked_regs():
- regsafe() uses check_ids() to verify that cached and current states
have identical register id mapping.
- func_states_equal() calls regsafe() only for registers computed as
live by compute_live_registers().
- clean_live_states() is supposed to remove dead registers from cached
states, but it can skip states belonging to an iterator-based loop.
- collect_linked_regs() collects all registers sharing the same id,
ignoring the marks computed by compute_live_registers().
Linked registers are stored in the state's jump history.
- backtrack_insn() marks all linked registers for an instruction
as precise whenever one of the linked registers is precise.
The above might lead to a scenario:
- There is an instruction I with register rY known to be dead at I.
- Instruction I is reached via two paths: first A, then B.
- On path A:
- There is an id link between registers rX and rY.
- Checkpoint C is created at I.
- Linked register set {rX, rY} is saved to the jump history.
- rX is marked as precise at I, causing both rX and rY
to be marked precise at C.
- On path B:
- There is no id link between registers rX and rY,
otherwise register states are sub-states of those in C.
- Because rY is dead at I, check_ids() returns true.
- Current state is considered equal to checkpoint C,
propagate_precision() propagates spurious precision
mark for register rY along the path B.
- Depending on a program, this might hit verifier_bug()
in the backtrack_insn(), e.g. if rY ∈ [r1..r5]
and backtrack_insn() spots a function call.
The reproducer program is in the next patch.
This was hit by sched_ext scx_lavd scheduler code.
Changes in tests:
- verifier_scalar_ids.c selftests need modification to preserve
some registers as live for __msg() checks.
- exceptions_assert.c adjusted to match changes in the verifier log,
R0 is dead after conditional instruction and thus does not get
range.
- precise.c adjusted to match changes in the verifier log, register r9
is dead after comparison and it's range is not important for test.
Reported-by: Emil Tsalapatis <emil@etsalapatis.com>
Fixes: 0fb3cf6110 ("bpf: use register liveness information for func_states_equal")
Signed-off-by: Eduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/r/20260306-linked-regs-and-propagate-precision-v1-1-18e859be570d@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
265 lines
9.5 KiB
C
265 lines
9.5 KiB
C
{
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"precise: test 1",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_0, 1),
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BPF_LD_MAP_FD(BPF_REG_6, 0),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_6),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_ST_MEM(BPF_DW, BPF_REG_FP, -8, 0),
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BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_REG(BPF_REG_9, BPF_REG_0),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_6),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_0),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_9, BPF_REG_8), /* map_value_ptr -= map_value_ptr */
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_9),
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BPF_JMP_IMM(BPF_JLT, BPF_REG_2, 8, 1),
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BPF_EXIT_INSN(),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, 1), /* R2=scalar(umin=1, umax=8) */
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8),
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BPF_MOV64_IMM(BPF_REG_3, 0),
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BPF_EMIT_CALL(BPF_FUNC_probe_read_kernel),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_TRACEPOINT,
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.fixup_map_array_48b = { 1 },
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.result = VERBOSE_ACCEPT,
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.errstr =
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"mark_precise: frame0: last_idx 26 first_idx 20\
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mark_precise: frame0: regs=r2 stack= before 25\
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mark_precise: frame0: regs=r2 stack= before 24\
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mark_precise: frame0: regs=r2 stack= before 23\
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mark_precise: frame0: regs=r2 stack= before 22\
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mark_precise: frame0: regs=r2 stack= before 20\
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mark_precise: frame0: parent state regs=r2 stack=:\
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mark_precise: frame0: last_idx 19 first_idx 10\
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mark_precise: frame0: regs=r2 stack= before 19\
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mark_precise: frame0: regs=r9 stack= before 18\
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mark_precise: frame0: regs=r8,r9 stack= before 17\
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mark_precise: frame0: regs=r0,r9 stack= before 15\
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mark_precise: frame0: regs=r0,r9 stack= before 14\
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mark_precise: frame0: regs=r9 stack= before 13\
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mark_precise: frame0: regs=r9 stack= before 12\
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mark_precise: frame0: regs=r9 stack= before 11\
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mark_precise: frame0: regs=r9 stack= before 10\
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mark_precise: frame0: parent state regs= stack=:",
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},
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{
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"precise: test 2",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_0, 1),
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BPF_LD_MAP_FD(BPF_REG_6, 0),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_6),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_ST_MEM(BPF_DW, BPF_REG_FP, -8, 0),
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BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_REG(BPF_REG_9, BPF_REG_0),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_6),
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -8),
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BPF_EMIT_CALL(BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_REG(BPF_REG_8, BPF_REG_0),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_9, BPF_REG_8), /* map_value_ptr -= map_value_ptr */
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BPF_MOV64_REG(BPF_REG_2, BPF_REG_9),
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BPF_JMP_IMM(BPF_JLT, BPF_REG_2, 8, 1),
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BPF_EXIT_INSN(),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, 1), /* R2=scalar(umin=1, umax=8) */
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_FP),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -8),
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BPF_MOV64_IMM(BPF_REG_3, 0),
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BPF_EMIT_CALL(BPF_FUNC_probe_read_kernel),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_TRACEPOINT,
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.fixup_map_array_48b = { 1 },
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.result = VERBOSE_ACCEPT,
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.flags = BPF_F_TEST_STATE_FREQ,
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.errstr =
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"26: (85) call bpf_probe_read_kernel#113\
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mark_precise: frame0: last_idx 26 first_idx 22\
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mark_precise: frame0: regs=r2 stack= before 25\
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mark_precise: frame0: regs=r2 stack= before 24\
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mark_precise: frame0: regs=r2 stack= before 23\
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mark_precise: frame0: regs=r2 stack= before 22\
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mark_precise: frame0: parent state regs=r2 stack=:\
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mark_precise: frame0: last_idx 20 first_idx 20\
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mark_precise: frame0: regs=r2 stack= before 20\
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mark_precise: frame0: parent state regs=r2 stack=:\
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mark_precise: frame0: last_idx 19 first_idx 17\
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mark_precise: frame0: regs=r2 stack= before 19\
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mark_precise: frame0: regs=r9 stack= before 18\
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mark_precise: frame0: regs=r8,r9 stack= before 17\
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mark_precise: frame0: parent state regs= stack=:",
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},
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{
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"precise: cross frame pruning",
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.insns = {
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
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BPF_MOV64_IMM(BPF_REG_8, 0),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_MOV64_IMM(BPF_REG_8, 1),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
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BPF_MOV64_IMM(BPF_REG_9, 0),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_MOV64_IMM(BPF_REG_9, 1),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 1, 0, 4),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_8, 1, 1),
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BPF_LDX_MEM(BPF_B, BPF_REG_1, BPF_REG_2, 0),
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BPF_MOV64_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_XDP,
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.flags = BPF_F_TEST_STATE_FREQ,
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.errstr = "!read_ok",
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.result = REJECT,
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},
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{
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"precise: ST zero to stack insn is supported",
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.insns = {
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BPF_MOV64_REG(BPF_REG_3, BPF_REG_10),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_3, 123, 0),
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/* not a register spill, so we stop precision propagation for R4 here */
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BPF_ST_MEM(BPF_DW, BPF_REG_3, -8, 0),
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BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
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BPF_MOV64_IMM(BPF_REG_0, -1),
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BPF_JMP_REG(BPF_JGT, BPF_REG_4, BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_XDP,
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.flags = BPF_F_TEST_STATE_FREQ,
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.errstr = "mark_precise: frame0: last_idx 5 first_idx 5\
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mark_precise: frame0: parent state regs=r4 stack=:\
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mark_precise: frame0: last_idx 4 first_idx 2\
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mark_precise: frame0: regs=r4 stack= before 4\
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mark_precise: frame0: regs=r4 stack= before 3\
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mark_precise: frame0: last_idx 5 first_idx 5\
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mark_precise: frame0: parent state regs=r0 stack=:\
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mark_precise: frame0: last_idx 4 first_idx 2\
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mark_precise: frame0: regs=r0 stack= before 4\
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5: R0=-1 R4=0",
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.result = VERBOSE_ACCEPT,
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.retval = -1,
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},
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{
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"precise: STX insn causing spi > allocated_stack",
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.insns = {
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
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/* make later reg spill more interesting by having somewhat known scalar */
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BPF_ALU64_IMM(BPF_AND, BPF_REG_0, 0xff),
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BPF_MOV64_REG(BPF_REG_3, BPF_REG_10),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_3, 123, 0),
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BPF_STX_MEM(BPF_DW, BPF_REG_3, BPF_REG_0, -8),
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BPF_LDX_MEM(BPF_DW, BPF_REG_4, BPF_REG_10, -8),
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BPF_MOV64_IMM(BPF_REG_0, -1),
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BPF_JMP_REG(BPF_JGT, BPF_REG_4, BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.prog_type = BPF_PROG_TYPE_XDP,
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.flags = BPF_F_TEST_STATE_FREQ,
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.errstr = "mark_precise: frame0: last_idx 7 first_idx 7\
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mark_precise: frame0: parent state regs=r4 stack=:\
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mark_precise: frame0: last_idx 6 first_idx 4\
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mark_precise: frame0: regs=r4 stack= before 6: (b7) r0 = -1\
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mark_precise: frame0: regs=r4 stack= before 5: (79) r4 = *(u64 *)(r10 -8)\
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mark_precise: frame0: regs= stack=-8 before 4: (7b) *(u64 *)(r3 -8) = r0\
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mark_precise: frame0: parent state regs=r0 stack=:\
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mark_precise: frame0: last_idx 3 first_idx 3\
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mark_precise: frame0: regs=r0 stack= before 3: (55) if r3 != 0x7b goto pc+0\
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mark_precise: frame0: regs=r0 stack= before 2: (bf) r3 = r10\
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mark_precise: frame0: regs=r0 stack= before 1: (57) r0 &= 255\
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mark_precise: frame0: parent state regs=r0 stack=:\
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mark_precise: frame0: last_idx 0 first_idx 0\
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mark_precise: frame0: regs=r0 stack= before 0: (85) call bpf_get_prandom_u32#7\
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mark_precise: frame0: last_idx 7 first_idx 7\
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mark_precise: frame0: parent state regs= stack=:",
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.result = VERBOSE_ACCEPT,
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.retval = -1,
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},
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{
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"precise: mark_chain_precision for ARG_CONST_ALLOC_SIZE_OR_ZERO",
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.insns = {
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BPF_LDX_MEM(BPF_W, BPF_REG_4, BPF_REG_1, offsetof(struct xdp_md, ingress_ifindex)),
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BPF_LD_MAP_FD(BPF_REG_6, 0),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_6),
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BPF_MOV64_IMM(BPF_REG_2, 1),
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BPF_MOV64_IMM(BPF_REG_3, 0),
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BPF_JMP_IMM(BPF_JEQ, BPF_REG_4, 0, 1),
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BPF_MOV64_IMM(BPF_REG_2, 0x1000),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_ringbuf_reserve),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_MOV64_REG(BPF_REG_1, BPF_REG_0),
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BPF_LDX_MEM(BPF_DW, BPF_REG_2, BPF_REG_0, 42),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_ringbuf_submit),
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BPF_MOV64_IMM(BPF_REG_0, 0),
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BPF_EXIT_INSN(),
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},
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.fixup_map_ringbuf = { 1 },
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.prog_type = BPF_PROG_TYPE_XDP,
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.flags = BPF_F_TEST_STATE_FREQ | F_NEEDS_EFFICIENT_UNALIGNED_ACCESS,
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.errstr = "invalid access to memory, mem_size=1 off=42 size=8",
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.result = REJECT,
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},
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{
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"precise: program doesn't prematurely prune branches",
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.insns = {
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_get_prandom_u32),
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BPF_ALU64_REG(BPF_MOV, BPF_REG_6, BPF_REG_0),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_7, 0),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_8, 0),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_9, 0x80000000),
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BPF_JMP_IMM(BPF_JA, 0, 0, 0),
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BPF_JMP_REG(BPF_JLE, BPF_REG_6, BPF_REG_9, 2),
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BPF_ALU64_IMM(BPF_MOD, BPF_REG_6, 1),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_9, 0),
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BPF_JMP_REG(BPF_JLE, BPF_REG_6, BPF_REG_9, 1),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_6, 0),
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BPF_ALU64_IMM(BPF_MOV, BPF_REG_0, 0),
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BPF_STX_MEM(BPF_W, BPF_REG_10, BPF_REG_0, -4),
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BPF_LD_MAP_FD(BPF_REG_4, 0),
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BPF_ALU64_REG(BPF_MOV, BPF_REG_1, BPF_REG_4),
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BPF_ALU64_REG(BPF_MOV, BPF_REG_2, BPF_REG_10),
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BPF_ALU64_IMM(BPF_ADD, BPF_REG_2, -4),
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BPF_RAW_INSN(BPF_JMP | BPF_CALL, 0, 0, 0, BPF_FUNC_map_lookup_elem),
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BPF_JMP_IMM(BPF_JNE, BPF_REG_0, 0, 1),
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BPF_EXIT_INSN(),
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BPF_ALU64_IMM(BPF_RSH, BPF_REG_6, 10),
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BPF_ALU64_IMM(BPF_MUL, BPF_REG_6, 8192),
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BPF_ALU64_REG(BPF_MOV, BPF_REG_1, BPF_REG_0),
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BPF_ALU64_REG(BPF_ADD, BPF_REG_0, BPF_REG_6),
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BPF_LDX_MEM(BPF_DW, BPF_REG_3, BPF_REG_0, 0),
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BPF_STX_MEM(BPF_DW, BPF_REG_1, BPF_REG_3, 0),
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BPF_EXIT_INSN(),
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},
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.fixup_map_array_48b = { 13 },
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.prog_type = BPF_PROG_TYPE_XDP,
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.result = REJECT,
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.errstr = "register with unbounded min value is not allowed",
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},
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