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d30c1683aa
Add a kselftest for RISC-V control flow integrity implementation for user mode. There is not a lot going on in the kernel to enable landing pad for user mode. CFI selftests are intended to be compiled with a zicfilp and zicfiss enabled compiler. This kselftest simply checks if landing pads and shadow stacks for the process are enabled or not and executes ptrace selftests on CFI. The selftest then registers a SIGSEGV signal handler. Any control flow violations are reported as SIGSEGV with si_code = SEGV_CPERR. The test will fail on receiving any SEGV_CPERR. The shadow stack part has more changes in the kernel, and thus there are separate tests for that. - Exercise 'map_shadow_stack' syscall - 'fork' test to make sure COW works for shadow stack pages - gup tests Kernel uses FOLL_FORCE when access happens to memory via /proc/<pid>/mem. Not breaking that for shadow stack. - signal test. Make sure signal delivery results in token creation on shadow stack and consumes (and verifies) token on sigreturn - shadow stack protection test. attempts to write using regular store instruction on shadow stack memory must result in access faults - ptrace test: adds landing pad violation, clears ELP and continues In case the toolchain doesn't support the CFI extension, the CFI kselftest won't be built. Test output =========== """ TAP version 13 1..5 This is to ensure shadow stack is indeed enabled and working This is to ensure shadow stack is indeed enabled and working ok 1 shstk fork test ok 2 map shadow stack syscall ok 3 shadow stack gup tests ok 4 shadow stack signal tests ok 5 memory protections of shadow stack memory """ Suggested-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Signed-off-by: Deepak Gupta <debug@rivosinc.com> Tested-by: Andreas Korb <andreas.korb@aisec.fraunhofer.de> # QEMU, custom CVA6 Tested-by: Valentin Haudiquet <valentin.haudiquet@canonical.com> Link: https://patch.msgid.link/20251112-v5_user_cfi_series-v23-28-b55691eacf4f@rivosinc.com [pjw@kernel.org: updated to apply; cleaned up patch description, code comments] Signed-off-by: Paul Walmsley <pjw@kernel.org>
83 lines
1.9 KiB
C
83 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SELFTEST_RISCV_CFI_H
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#define SELFTEST_RISCV_CFI_H
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#include <stddef.h>
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#include <sys/types.h>
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#include "shadowstack.h"
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#define CHILD_EXIT_CODE_SSWRITE 10
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#define CHILD_EXIT_CODE_SIG_TEST 11
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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register long _arg5 __asm__ ("a4") = (long)(arg5); \
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\
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__asm__ volatile( \
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"ecall\n" \
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: "+r" \
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(_arg1) \
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: "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("a7") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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\
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__asm__ volatile( \
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"ecall\n" \
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: "+r" (_arg1) \
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: "r"(_arg2), "r"(_arg3), \
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"r"(_num) \
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: "memory", "cc" \
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); \
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_arg1; \
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})
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#ifndef __NR_prctl
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#define __NR_prctl 167
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#endif
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#ifndef __NR_map_shadow_stack
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#define __NR_map_shadow_stack 453
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#endif
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#define CSR_SSP 0x011
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#ifdef __ASSEMBLY__
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#define __ASM_STR(x) x
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#else
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#define __ASM_STR(x) #x
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#endif
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#define csr_read(csr) \
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({ \
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register unsigned long __v; \
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__asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \
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: "=r" (__v) : \
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: "memory"); \
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__v; \
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})
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#define csr_write(csr, val) \
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({ \
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unsigned long __v = (unsigned long)(val); \
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__asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \
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: : "rK" (__v) \
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: "memory"); \
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})
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#endif
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