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linux/drivers/gpu/drm/amd/include/asic_reg/dcn
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Jerry (Fangzhi) Zuo 241b2ec931 drm/amd/display: Add dcn30 Headers (v2) 
DCN 3.0 display controller registers

v2: squash in updates from Bhawan.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-06-03 13:51:56 -04:00
..
dcn_1_0_offset.h
drm/amd/include: Add HUBPREQ_DEBUG register offsets
2019-04-23 17:27:08 -05:00
dcn_1_0_sh_mask.h
drm/amdgpu: Add CM_TEST_DEBUG regs for DCN
2018-04-11 13:07:35 -05:00
dcn_2_0_0_offset.h
drm/amd/include: Add OCSC registers
2020-01-16 13:41:06 -05:00
dcn_2_0_0_sh_mask.h
drm/amd/include: Add OCSC registers
2020-01-16 13:41:06 -05:00
dcn_2_1_0_offset.h
drm/amd/include: Add OCSC registers
2020-01-16 13:41:06 -05:00
dcn_2_1_0_sh_mask.h
drm/amd/include: Add OCSC registers
2020-01-16 13:41:06 -05:00
dcn_3_0_0_offset.h
drm/amd/display: Add dcn30 Headers (v2)
2020-06-03 13:51:56 -04:00
dcn_3_0_0_sh_mask.h
drm/amd/display: Add dcn30 Headers (v2)
2020-06-03 13:51:56 -04:00
dpcs_3_0_0_offset.h
drm/amd/display: Add dcn30 Headers (v2)
2020-06-03 13:51:56 -04:00
dpcs_3_0_0_sh_mask.h
drm/amd/display: Add dcn30 Headers (v2)
2020-06-03 13:51:56 -04:00