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dd08ebf6c3
Xe, is a new driver for Intel GPUs that supports both integrated and discrete platforms starting with Tiger Lake (first Intel Xe Architecture). The code is at a stage where it is already functional and has experimental support for multiple platforms starting from Tiger Lake, with initial support implemented in Mesa (for Iris and Anv, our OpenGL and Vulkan drivers), as well as in NEO (for OpenCL and Level0). The new Xe driver leverages a lot from i915. As for display, the intent is to share the display code with the i915 driver so that there is maximum reuse there. But it is not added in this patch. This initial work is a collaboration of many people and unfortunately the big squashed patch won't fully honor the proper credits. But let's get some git quick stats so we can at least try to preserve some of the credits: Co-developed-by: Matthew Brost <matthew.brost@intel.com> Co-developed-by: Matthew Auld <matthew.auld@intel.com> Co-developed-by: Matt Roper <matthew.d.roper@intel.com> Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Co-developed-by: Francois Dugast <francois.dugast@intel.com> Co-developed-by: Lucas De Marchi <lucas.demarchi@intel.com> Co-developed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Co-developed-by: Philippe Lecluse <philippe.lecluse@intel.com> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com> Co-developed-by: Jani Nikula <jani.nikula@intel.com> Co-developed-by: José Roberto de Souza <jose.souza@intel.com> Co-developed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Co-developed-by: Dave Airlie <airlied@redhat.com> Co-developed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Co-developed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Co-developed-by: Mauro Carvalho Chehab <mchehab@kernel.org> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2021 Intel Corporation
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include "xe_drv.h"
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#include "xe_hw_fence.h"
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#include "xe_module.h"
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#include "xe_pci.h"
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#include "xe_sched_job.h"
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bool enable_guc = true;
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module_param_named_unsafe(enable_guc, enable_guc, bool, 0444);
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MODULE_PARM_DESC(enable_guc, "Enable GuC submission");
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u32 xe_force_lmem_bar_size;
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module_param_named(lmem_bar_size, xe_force_lmem_bar_size, uint, 0600);
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MODULE_PARM_DESC(lmem_bar_size, "Set the lmem bar size(in MiB)");
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int xe_guc_log_level = 5;
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module_param_named(guc_log_level, xe_guc_log_level, int, 0600);
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MODULE_PARM_DESC(guc_log_level, "GuC firmware logging level (0=disable, 1..5=enable with verbosity min..max)");
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char *xe_param_force_probe = CONFIG_DRM_XE_FORCE_PROBE;
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module_param_named_unsafe(force_probe, xe_param_force_probe, charp, 0400);
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MODULE_PARM_DESC(force_probe,
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"Force probe options for specified devices. See CONFIG_DRM_XE_FORCE_PROBE for details.");
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struct init_funcs {
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int (*init)(void);
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void (*exit)(void);
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};
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#define MAKE_INIT_EXIT_FUNCS(name) \
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{ .init = xe_##name##_module_init, \
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.exit = xe_##name##_module_exit, }
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static const struct init_funcs init_funcs[] = {
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MAKE_INIT_EXIT_FUNCS(hw_fence),
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MAKE_INIT_EXIT_FUNCS(sched_job),
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};
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static int __init xe_init(void)
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{
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int err, i;
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for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
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err = init_funcs[i].init();
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if (err) {
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while (i--)
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init_funcs[i].exit();
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return err;
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}
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}
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return xe_register_pci_driver();
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}
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static void __exit xe_exit(void)
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{
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int i;
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xe_unregister_pci_driver();
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for (i = ARRAY_SIZE(init_funcs) - 1; i >= 0; i--)
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init_funcs[i].exit();
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}
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module_init(xe_init);
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module_exit(xe_exit);
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MODULE_AUTHOR("Intel Corporation");
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_LICENSE("GPL and additional rights");
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