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SEC2 is the name given by NVIDIA to the SEC engine post-Fermi (reasons unknown). Even though it shares the same address range as SEC, its usage is quite different and this justifies a new engine. Add this engine and make TOP use it all post-TOP devices should use this implementation and not the older SEC. Also quickly add the short gp102 implementation which will be used for falcon booting purposes. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
10 lines
226 B
C
10 lines
226 B
C
#ifndef __NVKM_SEC2_PRIV_H__
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#define __NVKM_SEC2_PRIV_H__
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#include <engine/sec2.h>
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#define nvkm_sec2(p) container_of((p), struct nvkm_sec2, engine)
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int nvkm_sec2_new_(struct nvkm_device *, int, struct nvkm_sec2 **);
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#endif
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