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The usage of ASM_FTR_IFCLR(CPU_TR_ARCH_31) requires asm/cputable.h and asm/feature-fixups.h. Currently these headers are included transitively, but that transitive inclusion is about to go away. Explicitly include the headers. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://patch.msgid.link/20260227-vdso-header-cleanups-v2-5-35d60acf7410@linutronix.de
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _ASM_POWERPC_VDSO_PROCESSOR_H
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#define _ASM_POWERPC_VDSO_PROCESSOR_H
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#ifndef __ASSEMBLER__
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#include <asm/cputable.h>
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#include <asm/feature-fixups.h>
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/* Macros for adjusting thread priority (hardware multi-threading) */
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#ifdef CONFIG_PPC64
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#define HMT_very_low() asm volatile("or 31, 31, 31 # very low priority")
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#define HMT_low() asm volatile("or 1, 1, 1 # low priority")
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#define HMT_medium_low() asm volatile("or 6, 6, 6 # medium low priority")
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#define HMT_medium() asm volatile("or 2, 2, 2 # medium priority")
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#define HMT_medium_high() asm volatile("or 5, 5, 5 # medium high priority")
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#define HMT_high() asm volatile("or 3, 3, 3 # high priority")
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#else
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#define HMT_very_low()
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#define HMT_low()
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#define HMT_medium_low()
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#define HMT_medium()
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#define HMT_medium_high()
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#define HMT_high()
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#endif
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#ifdef CONFIG_PPC64
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#define cpu_relax() \
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asm volatile(ASM_FTR_IFCLR( \
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/* Pre-POWER10 uses low ; medium priority nops */ \
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"or 1,1,1 ; or 2,2,2", \
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/* POWER10 onward uses pause_short (wait 2,0) */ \
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PPC_WAIT(2, 0), \
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%0) :: "i" (CPU_FTR_ARCH_31) : "memory")
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#else
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#define cpu_relax() barrier()
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#endif
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#endif /* __ASSEMBLER__ */
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#endif /* _ASM_POWERPC_VDSO_PROCESSOR_H */
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