Bing Guo 06050a0f01 drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X ...

Why:
In DCN2x, HW doesn't automatically divide MASTER_UPDATE_LOCK_DB_X
by the number of pipes ODM Combined.

How:
Set MASTER_UPDATE_LOCK_DB_X to the value that is adjusted by the
number of pipes ODM Combined.

Reviewed-by: Martin Leung <martin.leung@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Bing Guo <bing.guo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-08-05 21:02:29 -04:00

..

dcn20_dccg.c

drm/amd/display: Add interface for ADD & DROP PIXEL Registers

2021-06-08 12:22:42 -04:00

dcn20_dccg.h

drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN

2021-06-22 16:51:45 -04:00

dcn20_dpp_cm.c

drm/amd/display: Delete several unneeded bool conversions

2021-05-11 09:44:35 -04:00

dcn20_dpp.c

drm/amd/display: Increase linebuffer pixel depth to 36bpp.

2021-05-27 15:00:47 -04:00

dcn20_dpp.h

drm/amd/display: Add DSCL memory low power support

2020-12-01 16:03:40 -05:00

dcn20_dsc.c

drm/amd/display: Rename bytes_pp to the correct bits_pp

2020-07-27 16:23:21 -04:00

dcn20_dsc.h

drm/amd/display: Add DSC_DBG_EN shift/mask for dcn3

2020-08-17 14:09:27 -04:00

dcn20_dwb_scl.c

drm/amd/display: Remove set but not used variables 'h_ratio_chroma', 'v_ratio_chroma'

2019-10-07 15:10:43 -05:00

dcn20_dwb.c

…

dcn20_dwb.h

…

dcn20_hubbub.c

drm/amd/display: Add support for SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616.

2021-05-27 15:00:47 -04:00

dcn20_hubbub.h

drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN

2021-06-22 16:51:45 -04:00

dcn20_hubp.c

drm/amd/display: Add support for SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616.

2021-05-27 15:00:47 -04:00

dcn20_hubp.h

drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN

2021-06-22 16:51:45 -04:00

dcn20_hwseq.c

drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN

2021-06-22 16:51:45 -04:00

dcn20_hwseq.h

drm/amd/display: Refactor visual confirm

2021-06-08 12:18:37 -04:00

dcn20_init.c

drm/amd/display: Refactor visual confirm

2021-06-08 12:18:37 -04:00

dcn20_init.h

drm/amd/display: cleanup of function pointer tables

2019-11-19 10:12:53 -05:00

dcn20_link_encoder.c

drm/amdgpu/display: restore AUX_DPHY_TX_CONTROL for DCN2.x

2021-04-09 16:38:31 -04:00

dcn20_link_encoder.h

drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)

2020-11-04 17:11:37 -05:00

dcn20_mmhubbub.c

…

dcn20_mmhubbub.h

drm/amd/display: Update register defines

2020-02-11 11:50:18 -05:00

dcn20_mpc.c

drm/amd/display: Refactor visual confirm

2021-06-08 12:18:37 -04:00

dcn20_mpc.h

drm/amd/display: Use cursor locking to prevent flip delays

2020-04-28 16:19:56 -04:00

dcn20_opp.c

drm/amd/display: Raise DPG height during timing synchronization

2020-10-26 13:29:21 -04:00

dcn20_opp.h

drm/amd/display: Raise DPG height during timing synchronization

2020-10-26 13:29:21 -04:00

dcn20_optc.c

drm/amd/display: Fix Dynamic bpp issue with 8K30 with Navi 1X

2021-08-05 21:02:29 -04:00

dcn20_optc.h

drm/amd/display: Return last used DRR VTOTAL from DC

2021-06-08 12:20:12 -04:00

dcn20_resource.c

drm/amd/display: change zstate allow msg condition

2021-07-21 14:35:46 -04:00

dcn20_resource.h

drm/amd/display: Prevent freesync power optimization during validation

2020-11-10 14:24:48 -05:00

dcn20_stream_encoder.c

drm/amd/display: Add interface to get Calibrated Avg Level from FIFO

2021-06-15 17:25:41 -04:00

dcn20_stream_encoder.h

drm/amd/display: Add interface to get Calibrated Avg Level from FIFO

2021-06-15 17:25:41 -04:00

dcn20_vmid.c

drm/amd/display: Poll for GPUVM context ready (v2)

2019-07-18 14:18:09 -05:00

dcn20_vmid.h

drm/amd/display: Update register defines

2020-02-11 11:50:18 -05:00

Makefile

drm/amdgpu/display: drop DCN support for aarch64

2021-01-05 11:35:53 -05:00