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Merge tag 'wireless-next-2026-04-10' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next
Johannes Berg says: ==================== Final updates, notably: - crypto: move Michael MIC code into wireless (only) - mac80211: - multi-link 4-addr support - NAN data support (but no drivers yet) - ath10k: DT quirk to make it work on some devices - ath12k: IPQ5424 support - rtw89: USB improvements for performance * tag 'wireless-next-2026-04-10' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (124 commits) wifi: cfg80211: Explicitly include <linux/export.h> in michael-mic.c wifi: ath10k: Add device-tree quirk to skip host cap QMI requests dt-bindings: wireless: ath10k: Add quirk to skip host cap QMI requests crypto: Remove michael_mic from crypto_shash API wifi: ipw2x00: Use michael_mic() from cfg80211 wifi: ath12k: Use michael_mic() from cfg80211 wifi: ath11k: Use michael_mic() from cfg80211 wifi: mac80211, cfg80211: Export michael_mic() and move it to cfg80211 wifi: ipw2x00: Rename michael_mic() to libipw_michael_mic() wifi: libertas_tf: refactor endpoint lookup wifi: libertas: refactor endpoint lookup wifi: at76c50x: refactor endpoint lookup wifi: ath12k: Enable IPQ5424 WiFi device support wifi: ath12k: Add CE remap hardware parameters for IPQ5424 wifi: ath12k: add ath12k_hw_regs for IPQ5424 wifi: ath12k: add ath12k_hw_version_map entry for IPQ5424 wifi: ath12k: Add ath12k_hw_params for IPQ5424 dt-bindings: net: wireless: add ath12k wifi device IPQ5424 wifi: ath10k: fix station lookup failure during disconnect wifi: ath12k: Create symlink for each radio in a wiphy ... ==================== Link: https://patch.msgid.link/20260410064703.735099-3-johannes@sipsolutions.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
@@ -42,6 +42,7 @@ properties:
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- brcm,bcm4356-fmac
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- brcm,bcm4359-fmac
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- brcm,bcm4366-fmac
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- brcm,bcm43752-fmac
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- cypress,cyw4373-fmac
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- cypress,cyw43012-fmac
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- infineon,cyw43439-fmac
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@@ -171,6 +171,12 @@ properties:
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Quirk specifying that the firmware expects the 8bit version
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of the host capability QMI request
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qcom,snoc-host-cap-skip-quirk:
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type: boolean
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description:
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Quirk specifying that the firmware wants to skip the host
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capability QMI request
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qcom,xo-cal-data:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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@@ -292,6 +298,11 @@ allOf:
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required:
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- interrupts
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- not:
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required:
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- qcom,snoc-host-cap-8bit-quirk
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- qcom,snoc-host-cap-skip-quirk
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examples:
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# SNoC
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- |
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@@ -17,6 +17,7 @@ properties:
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compatible:
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enum:
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- qcom,ipq5332-wifi
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- qcom,ipq5424-wifi
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reg:
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maxItems: 1
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@@ -704,7 +704,6 @@ CONFIG_ROOT_NFS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_SECURITY=y
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CONFIG_CRYPTO_MICHAEL_MIC=y
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CONFIG_CRYPTO_GHASH_ARM_CE=m
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CONFIG_CRYPTO_AES=m
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CONFIG_CRYPTO_AES_ARM_BS=m
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@@ -230,7 +230,6 @@ CONFIG_CRYPTO_TEA=m
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CONFIG_CRYPTO_TWOFISH=m
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CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_SHA512=m
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CONFIG_CRYPTO_WP512=m
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CONFIG_FONTS=y
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@@ -1914,7 +1914,6 @@ CONFIG_CRYPTO_USER=y
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CONFIG_CRYPTO_CHACHA20=m
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CONFIG_CRYPTO_BENCHMARK=m
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CONFIG_CRYPTO_ECHAINIV=y
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_SHA3=m
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CONFIG_CRYPTO_USER_API_RNG=m
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CONFIG_CRYPTO_GHASH_ARM64_CE=y
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@@ -538,7 +538,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -495,7 +495,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -515,7 +515,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -487,7 +487,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -497,7 +497,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -514,7 +514,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -601,7 +601,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -487,7 +487,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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||||
|
||||
@@ -488,7 +488,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -504,7 +504,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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|
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@@ -485,7 +485,6 @@ CONFIG_CRYPTO_PCBC=m
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CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
|
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CONFIG_CRYPTO_MD4=m
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CONFIG_CRYPTO_MICHAEL_MIC=m
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CONFIG_CRYPTO_RMD160=m
|
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CONFIG_CRYPTO_SHA1=m
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CONFIG_CRYPTO_SM3_GENERIC=m
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@@ -485,7 +485,6 @@ CONFIG_CRYPTO_PCBC=m
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||||
CONFIG_CRYPTO_XTS=m
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CONFIG_CRYPTO_AEGIS128=m
|
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CONFIG_CRYPTO_MD4=m
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||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
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CONFIG_CRYPTO_RMD160=m
|
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CONFIG_CRYPTO_SHA1=m
|
||||
CONFIG_CRYPTO_SM3_GENERIC=m
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|
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@@ -222,7 +222,6 @@ CONFIG_CRYPTO_XTS=m
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||||
CONFIG_CRYPTO_HMAC=y
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CONFIG_CRYPTO_XCBC=m
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||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
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||||
|
||||
@@ -180,7 +180,6 @@ CONFIG_CRYPTO_CMAC=m
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CONFIG_CRYPTO_XCBC=m
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CONFIG_CRYPTO_CRC32=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
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CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
|
||||
@@ -175,7 +175,6 @@ CONFIG_CRYPTO_CMAC=m
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_CRC32=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
|
||||
@@ -175,7 +175,6 @@ CONFIG_CRYPTO_CMAC=m
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CONFIG_CRYPTO_XCBC=m
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||||
CONFIG_CRYPTO_CRC32=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
|
||||
@@ -275,7 +275,6 @@ CONFIG_CRYPTO_AUTHENC=m
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||||
CONFIG_CRYPTO_BENCHMARK=m
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||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
|
||||
@@ -159,7 +159,6 @@ CONFIG_CRYPTO_PCBC=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=y
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
|
||||
@@ -308,7 +308,6 @@ CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA1=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
|
||||
@@ -166,7 +166,6 @@ CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -167,7 +167,6 @@ CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -168,7 +168,6 @@ CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -170,7 +170,6 @@ CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -166,7 +166,6 @@ CONFIG_NLS_CODEPAGE_437=m
|
||||
CONFIG_NLS_ISO8859_1=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -662,7 +662,6 @@ CONFIG_CRYPTO_BENCHMARK=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -382,7 +382,6 @@ CONFIG_CRYPTO_LRW=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -85,7 +85,6 @@ CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
|
||||
@@ -258,7 +258,6 @@ CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_DEFLATE=y
|
||||
|
||||
@@ -286,7 +286,6 @@ CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_DEFLATE=m
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_PRINTK_TIME=y
|
||||
|
||||
@@ -236,7 +236,6 @@ CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_CRYPTO_BENCHMARK=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
|
||||
@@ -129,7 +129,6 @@ CONFIG_MAGIC_SYSRQ=y
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA1=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
|
||||
@@ -115,7 +115,6 @@ CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=20
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA1=m
|
||||
CONFIG_CRYPTO_BLOWFISH=m
|
||||
CONFIG_CRYPTO_DES=y
|
||||
|
||||
@@ -317,7 +317,6 @@ CONFIG_XMON=y
|
||||
CONFIG_CRYPTO_BENCHMARK=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
|
||||
@@ -380,7 +380,6 @@ CONFIG_CRYPTO_CAST6=m
|
||||
CONFIG_CRYPTO_SERPENT=m
|
||||
CONFIG_CRYPTO_TWOFISH=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_LZO=m
|
||||
|
||||
@@ -223,7 +223,6 @@ CONFIG_CRYPTO_CCM=m
|
||||
CONFIG_CRYPTO_GCM=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_WP512=m
|
||||
CONFIG_CRYPTO_ANUBIS=m
|
||||
|
||||
@@ -1076,7 +1076,6 @@ CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
|
||||
@@ -146,7 +146,6 @@ CONFIG_NLS=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_LZO=m
|
||||
CONFIG_PRINTK_TIME=y
|
||||
CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y
|
||||
|
||||
@@ -793,7 +793,6 @@ CONFIG_CRYPTO_GCM=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_SM3_GENERIC=m
|
||||
|
||||
@@ -777,7 +777,6 @@ CONFIG_CRYPTO_GCM=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_RMD160=m
|
||||
CONFIG_CRYPTO_SHA3=m
|
||||
CONFIG_CRYPTO_SM3_GENERIC=m
|
||||
|
||||
@@ -170,7 +170,6 @@ CONFIG_CRYPTO_XTS=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_XCBC=y
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=y
|
||||
CONFIG_CRYPTO_SHA1=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
|
||||
@@ -246,7 +246,6 @@ CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=y
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
|
||||
@@ -79,4 +79,3 @@ CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_CODEPAGE_932=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=y
|
||||
|
||||
@@ -82,7 +82,6 @@ CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_AES=m
|
||||
|
||||
@@ -210,7 +210,6 @@ CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_XTS=m
|
||||
CONFIG_CRYPTO_XCBC=y
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_SHA256=m
|
||||
CONFIG_CRYPTO_SHA512=m
|
||||
CONFIG_CRYPTO_TGR192=m
|
||||
|
||||
@@ -916,18 +916,6 @@ config CRYPTO_MD5
|
||||
help
|
||||
MD5 message digest algorithm (RFC1321), including HMAC support.
|
||||
|
||||
config CRYPTO_MICHAEL_MIC
|
||||
tristate "Michael MIC"
|
||||
select CRYPTO_HASH
|
||||
help
|
||||
Michael MIC (Message Integrity Code) (IEEE 802.11i)
|
||||
|
||||
Defined by the IEEE 802.11i TKIP (Temporal Key Integrity Protocol),
|
||||
known as WPA (Wif-Fi Protected Access).
|
||||
|
||||
This algorithm is required for TKIP, but it should not be used for
|
||||
other purposes because of the weakness of the algorithm.
|
||||
|
||||
config CRYPTO_RMD160
|
||||
tristate "RIPEMD-160"
|
||||
select CRYPTO_HASH
|
||||
|
||||
@@ -150,7 +150,6 @@ obj-$(CONFIG_CRYPTO_ARIA) += aria_generic.o
|
||||
obj-$(CONFIG_CRYPTO_CHACHA20) += chacha.o
|
||||
CFLAGS_chacha.o += -DARCH=$(ARCH)
|
||||
obj-$(CONFIG_CRYPTO_DEFLATE) += deflate.o
|
||||
obj-$(CONFIG_CRYPTO_MICHAEL_MIC) += michael_mic.o
|
||||
obj-$(CONFIG_CRYPTO_CRC32C) += crc32c-cryptoapi.o
|
||||
crc32c-cryptoapi-y := crc32c.o
|
||||
obj-$(CONFIG_CRYPTO_CRC32) += crc32-cryptoapi.o
|
||||
|
||||
@@ -1,176 +0,0 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Cryptographic API
|
||||
*
|
||||
* Michael MIC (IEEE 802.11i/TKIP) keyed digest
|
||||
*
|
||||
* Copyright (c) 2004 Jouni Malinen <j@w1.fi>
|
||||
*/
|
||||
#include <crypto/internal/hash.h>
|
||||
#include <linux/unaligned.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
|
||||
struct michael_mic_ctx {
|
||||
u32 l, r;
|
||||
};
|
||||
|
||||
struct michael_mic_desc_ctx {
|
||||
__le32 pending;
|
||||
size_t pending_len;
|
||||
|
||||
u32 l, r;
|
||||
};
|
||||
|
||||
static inline u32 xswap(u32 val)
|
||||
{
|
||||
return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
|
||||
}
|
||||
|
||||
|
||||
#define michael_block(l, r) \
|
||||
do { \
|
||||
r ^= rol32(l, 17); \
|
||||
l += r; \
|
||||
r ^= xswap(l); \
|
||||
l += r; \
|
||||
r ^= rol32(l, 3); \
|
||||
l += r; \
|
||||
r ^= ror32(l, 2); \
|
||||
l += r; \
|
||||
} while (0)
|
||||
|
||||
|
||||
static int michael_init(struct shash_desc *desc)
|
||||
{
|
||||
struct michael_mic_desc_ctx *mctx = shash_desc_ctx(desc);
|
||||
struct michael_mic_ctx *ctx = crypto_shash_ctx(desc->tfm);
|
||||
mctx->pending_len = 0;
|
||||
mctx->l = ctx->l;
|
||||
mctx->r = ctx->r;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int michael_update(struct shash_desc *desc, const u8 *data,
|
||||
unsigned int len)
|
||||
{
|
||||
struct michael_mic_desc_ctx *mctx = shash_desc_ctx(desc);
|
||||
|
||||
if (mctx->pending_len) {
|
||||
int flen = 4 - mctx->pending_len;
|
||||
if (flen > len)
|
||||
flen = len;
|
||||
memcpy((u8 *)&mctx->pending + mctx->pending_len, data, flen);
|
||||
mctx->pending_len += flen;
|
||||
data += flen;
|
||||
len -= flen;
|
||||
|
||||
if (mctx->pending_len < 4)
|
||||
return 0;
|
||||
|
||||
mctx->l ^= le32_to_cpu(mctx->pending);
|
||||
michael_block(mctx->l, mctx->r);
|
||||
mctx->pending_len = 0;
|
||||
}
|
||||
|
||||
while (len >= 4) {
|
||||
mctx->l ^= get_unaligned_le32(data);
|
||||
michael_block(mctx->l, mctx->r);
|
||||
data += 4;
|
||||
len -= 4;
|
||||
}
|
||||
|
||||
if (len > 0) {
|
||||
mctx->pending_len = len;
|
||||
memcpy(&mctx->pending, data, len);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int michael_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct michael_mic_desc_ctx *mctx = shash_desc_ctx(desc);
|
||||
u8 *data = (u8 *)&mctx->pending;
|
||||
|
||||
/* Last block and padding (0x5a, 4..7 x 0) */
|
||||
switch (mctx->pending_len) {
|
||||
case 0:
|
||||
mctx->l ^= 0x5a;
|
||||
break;
|
||||
case 1:
|
||||
mctx->l ^= data[0] | 0x5a00;
|
||||
break;
|
||||
case 2:
|
||||
mctx->l ^= data[0] | (data[1] << 8) | 0x5a0000;
|
||||
break;
|
||||
case 3:
|
||||
mctx->l ^= data[0] | (data[1] << 8) | (data[2] << 16) |
|
||||
0x5a000000;
|
||||
break;
|
||||
}
|
||||
michael_block(mctx->l, mctx->r);
|
||||
/* l ^= 0; */
|
||||
michael_block(mctx->l, mctx->r);
|
||||
|
||||
put_unaligned_le32(mctx->l, out);
|
||||
put_unaligned_le32(mctx->r, out + 4);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int michael_setkey(struct crypto_shash *tfm, const u8 *key,
|
||||
unsigned int keylen)
|
||||
{
|
||||
struct michael_mic_ctx *mctx = crypto_shash_ctx(tfm);
|
||||
|
||||
if (keylen != 8)
|
||||
return -EINVAL;
|
||||
|
||||
mctx->l = get_unaligned_le32(key);
|
||||
mctx->r = get_unaligned_le32(key + 4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct shash_alg alg = {
|
||||
.digestsize = 8,
|
||||
.setkey = michael_setkey,
|
||||
.init = michael_init,
|
||||
.update = michael_update,
|
||||
.final = michael_final,
|
||||
.descsize = sizeof(struct michael_mic_desc_ctx),
|
||||
.base = {
|
||||
.cra_name = "michael_mic",
|
||||
.cra_driver_name = "michael_mic-generic",
|
||||
.cra_blocksize = 8,
|
||||
.cra_ctxsize = sizeof(struct michael_mic_ctx),
|
||||
.cra_module = THIS_MODULE,
|
||||
}
|
||||
};
|
||||
|
||||
static int __init michael_mic_init(void)
|
||||
{
|
||||
return crypto_register_shash(&alg);
|
||||
}
|
||||
|
||||
|
||||
static void __exit michael_mic_exit(void)
|
||||
{
|
||||
crypto_unregister_shash(&alg);
|
||||
}
|
||||
|
||||
|
||||
module_init(michael_mic_init);
|
||||
module_exit(michael_mic_exit);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("Michael MIC");
|
||||
MODULE_AUTHOR("Jouni Malinen <j@w1.fi>");
|
||||
MODULE_ALIAS_CRYPTO("michael_mic");
|
||||
@@ -1557,10 +1557,6 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb)
|
||||
ret = min(ret, tcrypt_test("ecb(arc4)"));
|
||||
break;
|
||||
|
||||
case 17:
|
||||
ret = min(ret, tcrypt_test("michael_mic"));
|
||||
break;
|
||||
|
||||
case 18:
|
||||
ret = min(ret, tcrypt_test("crc32c"));
|
||||
break;
|
||||
|
||||
@@ -5197,12 +5197,6 @@ static const struct alg_test_desc alg_test_descs[] = {
|
||||
.suite = {
|
||||
.hash = __VECS(md5_tv_template)
|
||||
}
|
||||
}, {
|
||||
.alg = "michael_mic",
|
||||
.test = alg_test_hash,
|
||||
.suite = {
|
||||
.hash = __VECS(michael_mic_tv_template)
|
||||
}
|
||||
}, {
|
||||
.alg = "p1363(ecdsa-nist-p192)",
|
||||
.test = alg_test_null,
|
||||
|
||||
@@ -32808,56 +32808,6 @@ static const struct comp_testvec lzorle_decomp_tv_template[] = {
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Michael MIC test vectors from IEEE 802.11i
|
||||
*/
|
||||
#define MICHAEL_MIC_TEST_VECTORS 6
|
||||
|
||||
static const struct hash_testvec michael_mic_tv_template[] = {
|
||||
{
|
||||
.key = "\x00\x00\x00\x00\x00\x00\x00\x00",
|
||||
.ksize = 8,
|
||||
.plaintext = zeroed_string,
|
||||
.psize = 0,
|
||||
.digest = "\x82\x92\x5c\x1c\xa1\xd1\x30\xb8",
|
||||
},
|
||||
{
|
||||
.key = "\x82\x92\x5c\x1c\xa1\xd1\x30\xb8",
|
||||
.ksize = 8,
|
||||
.plaintext = "M",
|
||||
.psize = 1,
|
||||
.digest = "\x43\x47\x21\xca\x40\x63\x9b\x3f",
|
||||
},
|
||||
{
|
||||
.key = "\x43\x47\x21\xca\x40\x63\x9b\x3f",
|
||||
.ksize = 8,
|
||||
.plaintext = "Mi",
|
||||
.psize = 2,
|
||||
.digest = "\xe8\xf9\xbe\xca\xe9\x7e\x5d\x29",
|
||||
},
|
||||
{
|
||||
.key = "\xe8\xf9\xbe\xca\xe9\x7e\x5d\x29",
|
||||
.ksize = 8,
|
||||
.plaintext = "Mic",
|
||||
.psize = 3,
|
||||
.digest = "\x90\x03\x8f\xc6\xcf\x13\xc1\xdb",
|
||||
},
|
||||
{
|
||||
.key = "\x90\x03\x8f\xc6\xcf\x13\xc1\xdb",
|
||||
.ksize = 8,
|
||||
.plaintext = "Mich",
|
||||
.psize = 4,
|
||||
.digest = "\xd5\x5e\x10\x05\x10\x12\x89\x86",
|
||||
},
|
||||
{
|
||||
.key = "\xd5\x5e\x10\x05\x10\x12\x89\x86",
|
||||
.ksize = 8,
|
||||
.plaintext = "Michael",
|
||||
.psize = 7,
|
||||
.digest = "\x0a\x94\x2b\x12\x4e\xca\xa5\x46",
|
||||
}
|
||||
};
|
||||
|
||||
/*
|
||||
* CRC32 test vectors
|
||||
*/
|
||||
|
||||
@@ -808,6 +808,7 @@ out:
|
||||
static void ath10k_qmi_event_server_arrive(struct ath10k_qmi *qmi)
|
||||
{
|
||||
struct ath10k *ar = qmi->ar;
|
||||
struct ath10k_snoc *ar_snoc = ath10k_snoc_priv(ar);
|
||||
int ret;
|
||||
|
||||
ret = ath10k_qmi_ind_register_send_sync_msg(qmi);
|
||||
@@ -819,9 +820,15 @@ static void ath10k_qmi_event_server_arrive(struct ath10k_qmi *qmi)
|
||||
return;
|
||||
}
|
||||
|
||||
ret = ath10k_qmi_host_cap_send_sync(qmi);
|
||||
if (ret)
|
||||
return;
|
||||
/*
|
||||
* Skip the host capability request for the firmware versions which
|
||||
* do not support this feature.
|
||||
*/
|
||||
if (!test_bit(ATH10K_SNOC_FLAG_SKIP_HOST_CAP_QUIRK, &ar_snoc->flags)) {
|
||||
ret = ath10k_qmi_host_cap_send_sync(qmi);
|
||||
if (ret)
|
||||
return;
|
||||
}
|
||||
|
||||
ret = ath10k_qmi_msa_mem_info_send_sync_msg(qmi);
|
||||
if (ret)
|
||||
|
||||
@@ -1362,6 +1362,9 @@ static void ath10k_snoc_quirks_init(struct ath10k *ar)
|
||||
|
||||
if (of_property_read_bool(dev->of_node, "qcom,snoc-host-cap-8bit-quirk"))
|
||||
set_bit(ATH10K_SNOC_FLAG_8BIT_HOST_CAP_QUIRK, &ar_snoc->flags);
|
||||
|
||||
if (of_property_read_bool(dev->of_node, "qcom,snoc-host-cap-skip-quirk"))
|
||||
set_bit(ATH10K_SNOC_FLAG_SKIP_HOST_CAP_QUIRK, &ar_snoc->flags);
|
||||
}
|
||||
|
||||
int ath10k_snoc_fw_indication(struct ath10k *ar, u64 type)
|
||||
|
||||
@@ -51,6 +51,7 @@ enum ath10k_snoc_flags {
|
||||
ATH10K_SNOC_FLAG_MODEM_STOPPED,
|
||||
ATH10K_SNOC_FLAG_RECOVERY,
|
||||
ATH10K_SNOC_FLAG_8BIT_HOST_CAP_QUIRK,
|
||||
ATH10K_SNOC_FLAG_SKIP_HOST_CAP_QUIRK,
|
||||
};
|
||||
|
||||
struct clk_bulk_data;
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
* Copyright (c) 2005-2011 Atheros Communications Inc.
|
||||
* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
|
||||
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
#include "core.h"
|
||||
#include "debug.h"
|
||||
@@ -14,6 +14,7 @@
|
||||
#include "wmi-tlv.h"
|
||||
#include "p2p.h"
|
||||
#include "testmode.h"
|
||||
#include "txrx.h"
|
||||
#include <linux/bitfield.h>
|
||||
|
||||
/***************/
|
||||
@@ -224,8 +225,9 @@ static int ath10k_wmi_tlv_parse_peer_stats_info(struct ath10k *ar, u16 tag, u16
|
||||
const void *ptr, void *data)
|
||||
{
|
||||
const struct wmi_tlv_peer_stats_info *stat = ptr;
|
||||
struct ieee80211_sta *sta;
|
||||
u32 vdev_id = *(u32 *)data;
|
||||
struct ath10k_sta *arsta;
|
||||
struct ath10k_peer *peer;
|
||||
|
||||
if (tag != WMI_TLV_TAG_STRUCT_PEER_STATS_INFO)
|
||||
return -EPROTO;
|
||||
@@ -241,20 +243,20 @@ static int ath10k_wmi_tlv_parse_peer_stats_info(struct ath10k *ar, u16 tag, u16
|
||||
__le32_to_cpu(stat->last_tx_rate_code),
|
||||
__le32_to_cpu(stat->last_tx_bitrate_kbps));
|
||||
|
||||
rcu_read_lock();
|
||||
sta = ieee80211_find_sta_by_ifaddr(ar->hw, stat->peer_macaddr.addr, NULL);
|
||||
if (!sta) {
|
||||
rcu_read_unlock();
|
||||
ath10k_warn(ar, "not found station for peer stats\n");
|
||||
guard(spinlock_bh)(&ar->data_lock);
|
||||
|
||||
peer = ath10k_peer_find(ar, vdev_id, stat->peer_macaddr.addr);
|
||||
if (!peer || !peer->sta) {
|
||||
ath10k_warn(ar, "not found %s with vdev id %u mac addr %pM for peer stats\n",
|
||||
peer ? "sta" : "peer", vdev_id, stat->peer_macaddr.addr);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arsta = (struct ath10k_sta *)sta->drv_priv;
|
||||
arsta = (struct ath10k_sta *)peer->sta->drv_priv;
|
||||
arsta->rx_rate_code = __le32_to_cpu(stat->last_rx_rate_code);
|
||||
arsta->rx_bitrate_kbps = __le32_to_cpu(stat->last_rx_bitrate_kbps);
|
||||
arsta->tx_rate_code = __le32_to_cpu(stat->last_tx_rate_code);
|
||||
arsta->tx_bitrate_kbps = __le32_to_cpu(stat->last_tx_bitrate_kbps);
|
||||
rcu_read_unlock();
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -266,6 +268,7 @@ static int ath10k_wmi_tlv_op_pull_peer_stats_info(struct ath10k *ar,
|
||||
const struct wmi_tlv_peer_stats_info_ev *ev;
|
||||
const void *data;
|
||||
u32 num_peer_stats;
|
||||
u32 vdev_id;
|
||||
int ret;
|
||||
|
||||
tb = ath10k_wmi_tlv_parse_alloc(ar, skb->data, skb->len, GFP_ATOMIC);
|
||||
@@ -284,15 +287,16 @@ static int ath10k_wmi_tlv_op_pull_peer_stats_info(struct ath10k *ar,
|
||||
}
|
||||
|
||||
num_peer_stats = __le32_to_cpu(ev->num_peers);
|
||||
vdev_id = __le32_to_cpu(ev->vdev_id);
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_WMI,
|
||||
"wmi tlv peer stats info update peer vdev id %d peers %i more data %d\n",
|
||||
__le32_to_cpu(ev->vdev_id),
|
||||
vdev_id,
|
||||
num_peer_stats,
|
||||
__le32_to_cpu(ev->more_data));
|
||||
|
||||
ret = ath10k_wmi_tlv_iter(ar, data, ath10k_wmi_tlv_len(data),
|
||||
ath10k_wmi_tlv_parse_peer_stats_info, NULL);
|
||||
ath10k_wmi_tlv_parse_peer_stats_info, &vdev_id);
|
||||
if (ret)
|
||||
ath10k_warn(ar, "failed to parse stats info tlv: %d\n", ret);
|
||||
|
||||
|
||||
@@ -2,7 +2,6 @@
|
||||
config ATH11K
|
||||
tristate "Qualcomm Technologies 802.11ax chipset support"
|
||||
depends on MAC80211 && HAS_DMA
|
||||
select CRYPTO_MICHAEL_MIC
|
||||
select ATH_COMMON
|
||||
select QCOM_QMI_HELPERS
|
||||
help
|
||||
|
||||
@@ -5,7 +5,6 @@
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <crypto/hash.h>
|
||||
#include <linux/export.h>
|
||||
#include "core.h"
|
||||
#include "dp_tx.h"
|
||||
@@ -39,7 +38,6 @@ void ath11k_dp_peer_cleanup(struct ath11k *ar, int vdev_id, const u8 *addr)
|
||||
|
||||
ath11k_peer_rx_tid_cleanup(ar, peer);
|
||||
peer->dp_setup_done = false;
|
||||
crypto_free_shash(peer->tfm_mmic);
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
}
|
||||
|
||||
|
||||
@@ -4,10 +4,10 @@
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/fips.h>
|
||||
#include <linux/ieee80211.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <crypto/hash.h>
|
||||
#include "core.h"
|
||||
#include "debug.h"
|
||||
#include "debugfs_htt_stats.h"
|
||||
@@ -3182,16 +3182,13 @@ static void ath11k_dp_rx_frag_timer(struct timer_list *timer)
|
||||
int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct crypto_shash *tfm;
|
||||
struct ath11k_peer *peer;
|
||||
struct dp_rx_tid *rx_tid;
|
||||
int i;
|
||||
|
||||
tfm = crypto_alloc_shash("michael_mic", 0, 0);
|
||||
if (IS_ERR(tfm)) {
|
||||
ath11k_warn(ab, "failed to allocate michael_mic shash: %ld\n",
|
||||
PTR_ERR(tfm));
|
||||
return PTR_ERR(tfm);
|
||||
if (fips_enabled) {
|
||||
ath11k_warn(ab, "This driver is disabled due to FIPS\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
spin_lock_bh(&ab->base_lock);
|
||||
@@ -3200,7 +3197,6 @@ int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id
|
||||
if (!peer) {
|
||||
ath11k_warn(ab, "failed to find the peer to set up fragment info\n");
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
crypto_free_shash(tfm);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
@@ -3211,54 +3207,12 @@ int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id
|
||||
skb_queue_head_init(&rx_tid->rx_frags);
|
||||
}
|
||||
|
||||
peer->tfm_mmic = tfm;
|
||||
peer->dp_setup_done = true;
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
|
||||
struct ieee80211_hdr *hdr, u8 *data,
|
||||
size_t data_len, u8 *mic)
|
||||
{
|
||||
SHASH_DESC_ON_STACK(desc, tfm);
|
||||
u8 mic_hdr[16] = {};
|
||||
u8 tid = 0;
|
||||
int ret;
|
||||
|
||||
if (!tfm)
|
||||
return -EINVAL;
|
||||
|
||||
desc->tfm = tfm;
|
||||
|
||||
ret = crypto_shash_setkey(tfm, key, 8);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = crypto_shash_init(desc);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/* TKIP MIC header */
|
||||
memcpy(mic_hdr, ieee80211_get_DA(hdr), ETH_ALEN);
|
||||
memcpy(mic_hdr + ETH_ALEN, ieee80211_get_SA(hdr), ETH_ALEN);
|
||||
if (ieee80211_is_data_qos(hdr->frame_control))
|
||||
tid = ieee80211_get_tid(hdr);
|
||||
mic_hdr[12] = tid;
|
||||
|
||||
ret = crypto_shash_update(desc, mic_hdr, 16);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = crypto_shash_update(desc, data, data_len);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = crypto_shash_final(desc, mic);
|
||||
out:
|
||||
shash_desc_zero(desc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer *peer,
|
||||
struct sk_buff *msdu)
|
||||
{
|
||||
@@ -3267,7 +3221,7 @@ static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer
|
||||
struct ieee80211_key_conf *key_conf;
|
||||
struct ieee80211_hdr *hdr;
|
||||
u8 mic[IEEE80211_CCMP_MIC_LEN];
|
||||
int head_len, tail_len, ret;
|
||||
int head_len, tail_len;
|
||||
size_t data_len;
|
||||
u32 hdr_len, hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;
|
||||
u8 *key, *data;
|
||||
@@ -3293,8 +3247,8 @@ static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer
|
||||
data_len = msdu->len - head_len - tail_len;
|
||||
key = &key_conf->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
|
||||
|
||||
ret = ath11k_dp_rx_h_michael_mic(peer->tfm_mmic, key, hdr, data, data_len, mic);
|
||||
if (ret || memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
|
||||
michael_mic(key, hdr, data, data_len, mic);
|
||||
if (memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
|
||||
goto mic_fail;
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -29,7 +29,6 @@ struct ath11k_peer {
|
||||
/* Info used in MMIC verification of
|
||||
* RX fragments
|
||||
*/
|
||||
struct crypto_shash *tfm_mmic;
|
||||
u8 mcast_keyidx;
|
||||
u8 ucast_keyidx;
|
||||
u16 sec_type;
|
||||
|
||||
@@ -2,7 +2,6 @@
|
||||
config ATH12K
|
||||
tristate "Qualcomm Technologies Wi-Fi 7 support (ath12k)"
|
||||
depends on MAC80211 && HAS_DMA && PCI
|
||||
select CRYPTO_MICHAEL_MIC
|
||||
select QCOM_QMI_HELPERS
|
||||
select MHI_BUS
|
||||
select QRTR
|
||||
|
||||
@@ -382,8 +382,12 @@ static int ath12k_ahb_power_up(struct ath12k_base *ab)
|
||||
ATH12K_AHB_UPD_SWID;
|
||||
|
||||
/* Load FW image to a reserved memory location */
|
||||
ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region, mem_phys, mem_size,
|
||||
&mem_phys);
|
||||
if (ab_ahb->scm_auth_enabled)
|
||||
ret = qcom_mdt_load(dev, fw, fw_name, pasid, mem_region,
|
||||
mem_phys, mem_size, &mem_phys);
|
||||
else
|
||||
ret = qcom_mdt_load_no_init(dev, fw, fw_name, mem_region,
|
||||
mem_phys, mem_size, &mem_phys);
|
||||
if (ret) {
|
||||
ath12k_err(ab, "Failed to load MDT segments: %d\n", ret);
|
||||
goto err_fw;
|
||||
@@ -414,11 +418,13 @@ static int ath12k_ahb_power_up(struct ath12k_base *ab)
|
||||
goto err_fw2;
|
||||
}
|
||||
|
||||
/* Authenticate FW image using peripheral ID */
|
||||
ret = qcom_scm_pas_auth_and_reset(pasid);
|
||||
if (ret) {
|
||||
ath12k_err(ab, "failed to boot the remote processor %d\n", ret);
|
||||
goto err_fw2;
|
||||
if (ab_ahb->scm_auth_enabled) {
|
||||
/* Authenticate FW image using peripheral ID */
|
||||
ret = qcom_scm_pas_auth_and_reset(pasid);
|
||||
if (ret) {
|
||||
ath12k_err(ab, "failed to boot the remote processor %d\n", ret);
|
||||
goto err_fw2;
|
||||
}
|
||||
}
|
||||
|
||||
/* Instruct Q6 to spawn userPD thread */
|
||||
@@ -475,13 +481,15 @@ static void ath12k_ahb_power_down(struct ath12k_base *ab, bool is_suspend)
|
||||
|
||||
qcom_smem_state_update_bits(ab_ahb->stop_state, BIT(ab_ahb->stop_bit), 0);
|
||||
|
||||
pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
|
||||
ATH12K_AHB_UPD_SWID;
|
||||
/* Release the firmware */
|
||||
ret = qcom_scm_pas_shutdown(pasid);
|
||||
if (ret)
|
||||
ath12k_err(ab, "scm pas shutdown failed for userPD%d: %d\n",
|
||||
ab_ahb->userpd_id, ret);
|
||||
if (ab_ahb->scm_auth_enabled) {
|
||||
pasid = (u32_encode_bits(ab_ahb->userpd_id, ATH12K_USERPD_ID_MASK)) |
|
||||
ATH12K_AHB_UPD_SWID;
|
||||
/* Release the firmware */
|
||||
ret = qcom_scm_pas_shutdown(pasid);
|
||||
if (ret)
|
||||
ath12k_err(ab, "scm pas shutdown failed for userPD%d\n",
|
||||
ab_ahb->userpd_id);
|
||||
}
|
||||
}
|
||||
|
||||
static void ath12k_ahb_init_qmi_ce_config(struct ath12k_base *ab)
|
||||
|
||||
@@ -68,6 +68,7 @@ struct ath12k_ahb {
|
||||
int userpd_irq_num[ATH12K_USERPD_MAX_IRQ];
|
||||
const struct ath12k_ahb_ops *ahb_ops;
|
||||
const struct ath12k_ahb_device_family_ops *device_family_ops;
|
||||
bool scm_auth_enabled;
|
||||
};
|
||||
|
||||
struct ath12k_ahb_driver {
|
||||
|
||||
@@ -38,10 +38,15 @@
|
||||
#define PIPEDIR_INOUT 3 /* bidirectional */
|
||||
#define PIPEDIR_INOUT_H2H 4 /* bidirectional, host to host */
|
||||
|
||||
/* CE address/mask */
|
||||
#define CE_HOST_IE_ADDRESS 0x75804C
|
||||
#define CE_HOST_IE_2_ADDRESS 0x758050
|
||||
#define CE_HOST_IE_3_ADDRESS CE_HOST_IE_ADDRESS
|
||||
/* IPQ5332 CE address/mask */
|
||||
#define CE_HOST_IPQ5332_IE_ADDRESS 0x75804C
|
||||
#define CE_HOST_IPQ5332_IE_2_ADDRESS 0x758050
|
||||
#define CE_HOST_IPQ5332_IE_3_ADDRESS CE_HOST_IPQ5332_IE_ADDRESS
|
||||
|
||||
/* IPQ5424 CE address/mask */
|
||||
#define CE_HOST_IPQ5424_IE_ADDRESS 0x21804C
|
||||
#define CE_HOST_IPQ5424_IE_2_ADDRESS 0x218050
|
||||
#define CE_HOST_IPQ5424_IE_3_ADDRESS CE_HOST_IPQ5424_IE_ADDRESS
|
||||
|
||||
#define CE_HOST_IE_3_SHIFT 0xC
|
||||
|
||||
|
||||
@@ -835,8 +835,6 @@ static int ath12k_core_soc_create(struct ath12k_base *ab)
|
||||
goto err_qmi_deinit;
|
||||
}
|
||||
|
||||
ath12k_debugfs_pdev_create(ab);
|
||||
|
||||
return 0;
|
||||
|
||||
err_qmi_deinit:
|
||||
@@ -869,6 +867,8 @@ static int ath12k_core_pdev_create(struct ath12k_base *ab)
|
||||
goto err_dp_pdev_free;
|
||||
}
|
||||
|
||||
ath12k_debugfs_pdev_create(ab);
|
||||
|
||||
return 0;
|
||||
|
||||
err_dp_pdev_free:
|
||||
|
||||
@@ -157,6 +157,7 @@ enum ath12k_hw_rev {
|
||||
ATH12K_HW_WCN7850_HW20,
|
||||
ATH12K_HW_IPQ5332_HW10,
|
||||
ATH12K_HW_QCC2072_HW10,
|
||||
ATH12K_HW_IPQ5424_HW10,
|
||||
};
|
||||
|
||||
enum ath12k_firmware_mode {
|
||||
@@ -588,6 +589,7 @@ struct ath12k_dbg_htt_stats {
|
||||
struct ath12k_debug {
|
||||
struct dentry *debugfs_pdev;
|
||||
struct dentry *debugfs_pdev_symlink;
|
||||
struct dentry *debugfs_pdev_symlink_default;
|
||||
struct ath12k_dbg_htt_stats htt_stats;
|
||||
enum wmi_halphy_ctrl_path_stats_id tpc_stats_type;
|
||||
bool tpc_request;
|
||||
@@ -673,6 +675,7 @@ struct ath12k {
|
||||
u8 pdev_idx;
|
||||
u8 lmac_id;
|
||||
u8 hw_link_id;
|
||||
u8 radio_idx;
|
||||
|
||||
struct completion peer_assoc_done;
|
||||
struct completion peer_delete_done;
|
||||
@@ -1366,13 +1369,13 @@ static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw)
|
||||
return hw->priv;
|
||||
}
|
||||
|
||||
static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 hw_link_id)
|
||||
static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 radio_idx)
|
||||
{
|
||||
if (WARN(hw_link_id >= ah->num_radio,
|
||||
"bad hw link id %d, so switch to default link\n", hw_link_id))
|
||||
hw_link_id = 0;
|
||||
if (WARN(radio_idx >= ah->num_radio,
|
||||
"bad radio index %d, use default radio\n", radio_idx))
|
||||
radio_idx = 0;
|
||||
|
||||
return &ah->radio[hw_link_id];
|
||||
return &ah->radio[radio_idx];
|
||||
}
|
||||
|
||||
static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar)
|
||||
|
||||
@@ -1473,18 +1473,35 @@ void ath12k_debugfs_register(struct ath12k *ar)
|
||||
{
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct ieee80211_hw *hw = ar->ah->hw;
|
||||
char pdev_name[5];
|
||||
struct ath12k_hw *ah = ath12k_hw_to_ah(hw);
|
||||
struct dentry *ath12k_fs;
|
||||
char buf[100] = {};
|
||||
char pdev_name[5];
|
||||
|
||||
scnprintf(pdev_name, sizeof(pdev_name), "%s%d", "mac", ar->pdev_idx);
|
||||
|
||||
ar->debug.debugfs_pdev = debugfs_create_dir(pdev_name, ab->debugfs_soc);
|
||||
|
||||
/* Create a symlink under ieee80211/phy* */
|
||||
scnprintf(buf, sizeof(buf), "../../ath12k/%pd2", ar->debug.debugfs_pdev);
|
||||
ar->debug.debugfs_pdev_symlink = debugfs_create_symlink("ath12k",
|
||||
hw->wiphy->debugfsdir,
|
||||
buf);
|
||||
if (ar->radio_idx == 0) {
|
||||
scnprintf(buf, sizeof(buf), "../../ath12k/%pd2",
|
||||
ar->debug.debugfs_pdev);
|
||||
ath12k_fs = hw->wiphy->debugfsdir;
|
||||
|
||||
/* symbolic link for compatibility */
|
||||
ar->debug.debugfs_pdev_symlink_default = debugfs_create_symlink("ath12k",
|
||||
ath12k_fs,
|
||||
buf);
|
||||
}
|
||||
|
||||
if (ah->num_radio > 1) {
|
||||
scnprintf(buf, sizeof(buf), "../../../ath12k/%pd2",
|
||||
ar->debug.debugfs_pdev);
|
||||
ath12k_fs = hw->wiphy->radio_cfg[ar->radio_idx].radio_debugfsdir;
|
||||
ar->debug.debugfs_pdev_symlink = debugfs_create_symlink("ath12k",
|
||||
ath12k_fs,
|
||||
buf);
|
||||
}
|
||||
|
||||
if (ar->mac.sbands[NL80211_BAND_5GHZ].channels) {
|
||||
debugfs_create_file("dfs_simulate_radar", 0200,
|
||||
@@ -1513,7 +1530,9 @@ void ath12k_debugfs_unregister(struct ath12k *ar)
|
||||
|
||||
/* Remove symlink under ieee80211/phy* */
|
||||
debugfs_remove(ar->debug.debugfs_pdev_symlink);
|
||||
debugfs_remove(ar->debug.debugfs_pdev_symlink_default);
|
||||
debugfs_remove_recursive(ar->debug.debugfs_pdev);
|
||||
ar->debug.debugfs_pdev_symlink = NULL;
|
||||
ar->debug.debugfs_pdev_symlink_default = NULL;
|
||||
ar->debug.debugfs_pdev = NULL;
|
||||
}
|
||||
|
||||
@@ -5722,6 +5722,75 @@ ath12k_htt_print_tx_hwq_stats_cmn_tlv(const void *tag_buf, u16 tag_len,
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_chan_switch_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_chan_switch_stats_tlv *sbuf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 switch_freq, switch_profile;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
u8 i;
|
||||
|
||||
if (tag_len < sizeof(*sbuf))
|
||||
return;
|
||||
|
||||
i = min(le32_to_cpu(sbuf->switch_count), ATH12K_HTT_CHAN_SWITCH_STATS_BUF_LEN);
|
||||
if (!i)
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "Channel Change Timings:\n");
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"|%-20s|%-21s|%-7s|%-12s|%-12s|%-15s|",
|
||||
"PRIMARY CHANNEL FREQ", "BANDWIDTH CENTER FREQ", "PHYMODE",
|
||||
"TX_CHAINMASK", "RX_CHAINMASK", "SWITCH TIME(us)");
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"%-7s|%-11s|%-7s|%-8s|%-7s|%-10s|\n",
|
||||
"INI(us)", "TPC+CTL(us)", "CAL(us)", "MISC(us)", "CTL(us)",
|
||||
"SW PROFILE");
|
||||
|
||||
/*
|
||||
* sbuf->switch_count has the number of successful channel changes. The firmware
|
||||
* sends the record of channel change in such a way that sbuf->chan_stats[0] will
|
||||
* point to the channel change that occurred first and the recent channel change
|
||||
* records will be stored in sbuf->chan_stats[9]. As and when new channel change
|
||||
* occurs, sbuf->chan_stats[0] will be replaced by records from the next index,
|
||||
* sbuf->chan_stats[1]. While printing the records, reverse chronological order
|
||||
* is followed, i.e., the most recent channel change records are printed first
|
||||
* and the oldest one, last.
|
||||
*/
|
||||
while (i--) {
|
||||
switch_freq = le32_to_cpu(sbuf->chan_stats[i].chan_switch_freq);
|
||||
switch_profile = le32_to_cpu(sbuf->chan_stats[i].chan_switch_profile);
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"|%20u|%21u|%7u|%12u|%12u|%15u|",
|
||||
u32_get_bits(switch_freq,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_BW_MHZ),
|
||||
u32_get_bits(switch_freq,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_BAND_FREQ),
|
||||
u32_get_bits(switch_profile,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_PHY_MODE),
|
||||
u32_get_bits(switch_profile,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_TX_CHAINMASK),
|
||||
u32_get_bits(switch_profile,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_RX_CHAINMASK),
|
||||
le32_to_cpu(sbuf->chan_stats[i].chan_switch_time));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"%7u|%11u|%7u|%8u|%7u|%10u|\n",
|
||||
le32_to_cpu(sbuf->chan_stats[i].ini_module_time),
|
||||
le32_to_cpu(sbuf->chan_stats[i].tpc_module_time),
|
||||
le32_to_cpu(sbuf->chan_stats[i].cal_module_time),
|
||||
le32_to_cpu(sbuf->chan_stats[i].misc_module_time),
|
||||
le32_to_cpu(sbuf->chan_stats[i].ctl_module_time),
|
||||
u32_get_bits(switch_profile,
|
||||
ATH12K_HTT_STATS_CHAN_SWITCH_SW_PROFILE));
|
||||
}
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
|
||||
u16 tag, u16 len, const void *tag_buf,
|
||||
void *user_data)
|
||||
@@ -6024,6 +6093,9 @@ static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
|
||||
case HTT_STATS_TX_HWQ_CMN_TAG:
|
||||
ath12k_htt_print_tx_hwq_stats_cmn_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_CHAN_SWITCH_STATS_TAG:
|
||||
ath12k_htt_print_chan_switch_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -164,6 +164,7 @@ enum ath12k_dbg_htt_ext_stats_type {
|
||||
ATH12K_DBG_HTT_PDEV_MLO_IPC_STATS = 64,
|
||||
ATH12K_DBG_HTT_EXT_PDEV_RTT_RESP_STATS = 65,
|
||||
ATH12K_DBG_HTT_EXT_PDEV_RTT_INITIATOR_STATS = 66,
|
||||
ATH12K_DBG_HTT_EXT_CHAN_SWITCH_STATS = 76,
|
||||
|
||||
/* keep this last */
|
||||
ATH12K_DBG_HTT_NUM_EXT_STATS,
|
||||
@@ -267,6 +268,7 @@ enum ath12k_dbg_htt_tlv_tag {
|
||||
HTT_STATS_PDEV_RTT_HW_STATS_TAG = 196,
|
||||
HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG = 197,
|
||||
HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198,
|
||||
HTT_STATS_CHAN_SWITCH_STATS_TAG = 213,
|
||||
|
||||
HTT_STATS_MAX_TAG,
|
||||
};
|
||||
@@ -2156,4 +2158,28 @@ struct htt_tx_hwq_stats_cmn_tlv {
|
||||
__le32 txq_timeout;
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_CHAN_SWITCH_STATS_BUF_LEN 10
|
||||
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_BW_MHZ GENMASK(15, 0)
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_BAND_FREQ GENMASK(31, 16)
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_PHY_MODE GENMASK(7, 0)
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_TX_CHAINMASK GENMASK(15, 8)
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_RX_CHAINMASK GENMASK(23, 16)
|
||||
#define ATH12K_HTT_STATS_CHAN_SWITCH_SW_PROFILE GENMASK(31, 24)
|
||||
|
||||
struct ath12k_htt_chan_switch_stats_tlv {
|
||||
struct {
|
||||
__le32 chan_switch_freq;
|
||||
__le32 chan_switch_profile;
|
||||
__le32 chan_switch_time;
|
||||
__le32 cal_module_time;
|
||||
__le32 ini_module_time;
|
||||
__le32 tpc_module_time;
|
||||
__le32 misc_module_time;
|
||||
__le32 ctl_module_time;
|
||||
__le32 reserved;
|
||||
} chan_stats[ATH12K_HTT_CHAN_SWITCH_STATS_BUF_LEN];
|
||||
__le32 switch_count; /* shows how many channel changes have occurred */
|
||||
} __packed;
|
||||
|
||||
#endif
|
||||
|
||||
@@ -4,7 +4,6 @@
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <crypto/hash.h>
|
||||
#include "core.h"
|
||||
#include "dp_tx.h"
|
||||
#include "hif.h"
|
||||
@@ -41,7 +40,6 @@ void ath12k_dp_peer_cleanup(struct ath12k *ar, int vdev_id, const u8 *addr)
|
||||
}
|
||||
|
||||
ath12k_dp_rx_peer_tid_cleanup(ar, peer);
|
||||
crypto_free_shash(peer->dp_peer->tfm_mmic);
|
||||
peer->dp_peer->dp_setup_done = false;
|
||||
spin_unlock_bh(&dp->dp_lock);
|
||||
}
|
||||
|
||||
@@ -139,7 +139,6 @@ struct ath12k_dp_peer {
|
||||
u16 sec_type;
|
||||
|
||||
/* Info used in MMIC verification of * RX fragments */
|
||||
struct crypto_shash *tfm_mmic;
|
||||
struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
|
||||
struct ath12k_dp_link_peer __rcu *link_peers[ATH12K_NUM_MAX_LINKS];
|
||||
struct ath12k_reoq_buf reoq_bufs[IEEE80211_NUM_TIDS + 1];
|
||||
|
||||
@@ -4,10 +4,10 @@
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/fips.h>
|
||||
#include <linux/ieee80211.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <crypto/hash.h>
|
||||
#include "core.h"
|
||||
#include "debug.h"
|
||||
#include "hw.h"
|
||||
@@ -1433,29 +1433,27 @@ static void ath12k_dp_rx_frag_timer(struct timer_list *timer)
|
||||
int ath12k_dp_rx_peer_frag_setup(struct ath12k *ar, const u8 *peer_mac, int vdev_id)
|
||||
{
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct crypto_shash *tfm;
|
||||
struct ath12k_dp_link_peer *peer;
|
||||
struct ath12k_dp_rx_tid *rx_tid;
|
||||
int i;
|
||||
struct ath12k_dp *dp = ath12k_ab_to_dp(ab);
|
||||
|
||||
tfm = crypto_alloc_shash("michael_mic", 0, 0);
|
||||
if (IS_ERR(tfm))
|
||||
return PTR_ERR(tfm);
|
||||
if (fips_enabled) {
|
||||
ath12k_warn(ab, "This driver is disabled due to FIPS\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
spin_lock_bh(&dp->dp_lock);
|
||||
|
||||
peer = ath12k_dp_link_peer_find_by_vdev_and_addr(dp, vdev_id, peer_mac);
|
||||
if (!peer || !peer->dp_peer) {
|
||||
spin_unlock_bh(&dp->dp_lock);
|
||||
crypto_free_shash(tfm);
|
||||
ath12k_warn(ab, "failed to find the peer to set up fragment info\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
if (!peer->primary_link) {
|
||||
spin_unlock_bh(&dp->dp_lock);
|
||||
crypto_free_shash(tfm);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1466,55 +1464,12 @@ int ath12k_dp_rx_peer_frag_setup(struct ath12k *ar, const u8 *peer_mac, int vdev
|
||||
skb_queue_head_init(&rx_tid->rx_frags);
|
||||
}
|
||||
|
||||
peer->dp_peer->tfm_mmic = tfm;
|
||||
peer->dp_peer->dp_setup_done = true;
|
||||
spin_unlock_bh(&dp->dp_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ath12k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
|
||||
struct ieee80211_hdr *hdr, u8 *data,
|
||||
size_t data_len, u8 *mic)
|
||||
{
|
||||
SHASH_DESC_ON_STACK(desc, tfm);
|
||||
u8 mic_hdr[16] = {};
|
||||
u8 tid = 0;
|
||||
int ret;
|
||||
|
||||
if (!tfm)
|
||||
return -EINVAL;
|
||||
|
||||
desc->tfm = tfm;
|
||||
|
||||
ret = crypto_shash_setkey(tfm, key, 8);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = crypto_shash_init(desc);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
/* TKIP MIC header */
|
||||
memcpy(mic_hdr, ieee80211_get_DA(hdr), ETH_ALEN);
|
||||
memcpy(mic_hdr + ETH_ALEN, ieee80211_get_SA(hdr), ETH_ALEN);
|
||||
if (ieee80211_is_data_qos(hdr->frame_control))
|
||||
tid = ieee80211_get_tid(hdr);
|
||||
mic_hdr[12] = tid;
|
||||
|
||||
ret = crypto_shash_update(desc, mic_hdr, 16);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = crypto_shash_update(desc, data, data_len);
|
||||
if (ret)
|
||||
goto out;
|
||||
ret = crypto_shash_final(desc, mic);
|
||||
out:
|
||||
shash_desc_zero(desc);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(ath12k_dp_rx_h_michael_mic);
|
||||
|
||||
void ath12k_dp_rx_h_undecap_frag(struct ath12k_pdev_dp *dp_pdev, struct sk_buff *msdu,
|
||||
enum hal_encrypt_type enctype, u32 flags)
|
||||
{
|
||||
|
||||
@@ -6,7 +6,6 @@
|
||||
#ifndef ATH12K_DP_RX_H
|
||||
#define ATH12K_DP_RX_H
|
||||
|
||||
#include <crypto/hash.h>
|
||||
#include "core.h"
|
||||
#include "debug.h"
|
||||
|
||||
@@ -204,9 +203,6 @@ void ath12k_dp_rx_h_sort_frags(struct ath12k_hal *hal,
|
||||
struct sk_buff *cur_frag);
|
||||
void ath12k_dp_rx_h_undecap_frag(struct ath12k_pdev_dp *dp_pdev, struct sk_buff *msdu,
|
||||
enum hal_encrypt_type enctype, u32 flags);
|
||||
int ath12k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
|
||||
struct ieee80211_hdr *hdr, u8 *data,
|
||||
size_t data_len, u8 *mic);
|
||||
int ath12k_dp_rx_ampdu_start(struct ath12k *ar,
|
||||
struct ieee80211_ampdu_params *params,
|
||||
u8 link_id);
|
||||
|
||||
@@ -11131,7 +11131,7 @@ ath12k_mac_mlo_get_vdev_args(struct ath12k_link_vif *arvif,
|
||||
if (arvif == arvif_p)
|
||||
continue;
|
||||
|
||||
if (!arvif_p->is_created)
|
||||
if (!arvif_p->is_started)
|
||||
continue;
|
||||
|
||||
link_conf = wiphy_dereference(ahvif->ah->hw->wiphy,
|
||||
@@ -15065,6 +15065,7 @@ static struct ath12k_hw *ath12k_mac_hw_allocate(struct ath12k_hw_group *ag,
|
||||
ar->hw_link_id = pdev->hw_link_id;
|
||||
ar->pdev = pdev;
|
||||
ar->pdev_idx = pdev_idx;
|
||||
ar->radio_idx = i;
|
||||
pdev->ar = ar;
|
||||
|
||||
ag->hw_links[ar->hw_link_id].device_id = ab->device_id;
|
||||
@@ -15132,7 +15133,6 @@ int ath12k_mac_allocate(struct ath12k_hw_group *ag)
|
||||
if (!ab)
|
||||
continue;
|
||||
|
||||
ath12k_debugfs_pdev_create(ab);
|
||||
ath12k_mac_set_device_defaults(ab);
|
||||
total_radio += ab->num_radios;
|
||||
}
|
||||
|
||||
@@ -19,6 +19,9 @@ static const struct of_device_id ath12k_wifi7_ahb_of_match[] = {
|
||||
{ .compatible = "qcom,ipq5332-wifi",
|
||||
.data = (void *)ATH12K_HW_IPQ5332_HW10,
|
||||
},
|
||||
{ .compatible = "qcom,ipq5424-wifi",
|
||||
.data = (void *)ATH12K_HW_IPQ5424_HW10,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
@@ -38,6 +41,11 @@ static int ath12k_wifi7_ahb_probe(struct platform_device *pdev)
|
||||
switch (hw_rev) {
|
||||
case ATH12K_HW_IPQ5332_HW10:
|
||||
ab_ahb->userpd_id = ATH12K_IPQ5332_USERPD_ID;
|
||||
ab_ahb->scm_auth_enabled = true;
|
||||
break;
|
||||
case ATH12K_HW_IPQ5424_HW10:
|
||||
ab_ahb->userpd_id = ATH12K_IPQ5332_USERPD_ID;
|
||||
ab_ahb->scm_auth_enabled = false;
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
@@ -983,7 +983,7 @@ static int ath12k_wifi7_dp_rx_h_verify_tkip_mic(struct ath12k_pdev_dp *dp_pdev,
|
||||
struct ieee80211_key_conf *key_conf;
|
||||
struct ieee80211_hdr *hdr;
|
||||
u8 mic[IEEE80211_CCMP_MIC_LEN];
|
||||
int head_len, tail_len, ret;
|
||||
int head_len, tail_len;
|
||||
size_t data_len;
|
||||
u32 hdr_len, hal_rx_desc_sz = hal->hal_desc_sz;
|
||||
u8 *key, *data;
|
||||
@@ -1011,9 +1011,8 @@ static int ath12k_wifi7_dp_rx_h_verify_tkip_mic(struct ath12k_pdev_dp *dp_pdev,
|
||||
data_len = msdu->len - head_len - tail_len;
|
||||
key = &key_conf->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];
|
||||
|
||||
ret = ath12k_dp_rx_h_michael_mic(peer->tfm_mmic, key, hdr, data,
|
||||
data_len, mic);
|
||||
if (ret || memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
|
||||
michael_mic(key, hdr, data, data_len, mic);
|
||||
if (memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))
|
||||
goto mic_fail;
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -50,6 +50,13 @@ static const struct ath12k_hw_version_map ath12k_wifi7_hw_ver_map[] = {
|
||||
.hal_params = &ath12k_hw_hal_params_wcn7850,
|
||||
.hw_regs = &qcc2072_regs,
|
||||
},
|
||||
[ATH12K_HW_IPQ5424_HW10] = {
|
||||
.hal_ops = &hal_qcn9274_ops,
|
||||
.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9274_compact),
|
||||
.tcl_to_wbm_rbm_map = ath12k_hal_tcl_to_wbm_rbm_map_qcn9274,
|
||||
.hal_params = &ath12k_hw_hal_params_ipq5332,
|
||||
.hw_regs = &ipq5424_regs,
|
||||
},
|
||||
};
|
||||
|
||||
int ath12k_wifi7_hal_init(struct ath12k_base *ab)
|
||||
|
||||
@@ -364,6 +364,9 @@
|
||||
#define HAL_IPQ5332_CE_WFSS_REG_BASE 0x740000
|
||||
#define HAL_IPQ5332_CE_SIZE 0x100000
|
||||
|
||||
#define HAL_IPQ5424_CE_WFSS_REG_BASE 0x200000
|
||||
#define HAL_IPQ5424_CE_SIZE 0x100000
|
||||
|
||||
#define HAL_RX_MAX_BA_WINDOW 256
|
||||
|
||||
#define HAL_DEFAULT_BE_BK_VI_REO_TIMEOUT_USEC (100 * 1000)
|
||||
|
||||
@@ -484,6 +484,94 @@ const struct ath12k_hw_regs ipq5332_regs = {
|
||||
HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
};
|
||||
|
||||
const struct ath12k_hw_regs ipq5424_regs = {
|
||||
/* SW2TCL(x) R0 ring configuration address */
|
||||
.tcl1_ring_id = 0x00000918,
|
||||
.tcl1_ring_misc = 0x00000920,
|
||||
.tcl1_ring_tp_addr_lsb = 0x0000092c,
|
||||
.tcl1_ring_tp_addr_msb = 0x00000930,
|
||||
.tcl1_ring_consumer_int_setup_ix0 = 0x00000940,
|
||||
.tcl1_ring_consumer_int_setup_ix1 = 0x00000944,
|
||||
.tcl1_ring_msi1_base_lsb = 0x00000958,
|
||||
.tcl1_ring_msi1_base_msb = 0x0000095c,
|
||||
.tcl1_ring_base_lsb = 0x00000910,
|
||||
.tcl1_ring_base_msb = 0x00000914,
|
||||
.tcl1_ring_msi1_data = 0x00000960,
|
||||
.tcl2_ring_base_lsb = 0x00000988,
|
||||
.tcl_ring_base_lsb = 0x00000b68,
|
||||
|
||||
/* TCL STATUS ring address */
|
||||
.tcl_status_ring_base_lsb = 0x00000d48,
|
||||
|
||||
/* REO DEST ring address */
|
||||
.reo2_ring_base = 0x00000578,
|
||||
.reo1_misc_ctrl_addr = 0x00000b9c,
|
||||
.reo1_sw_cookie_cfg0 = 0x0000006c,
|
||||
.reo1_sw_cookie_cfg1 = 0x00000070,
|
||||
.reo1_qdesc_lut_base0 = 0x00000074,
|
||||
.reo1_qdesc_lut_base1 = 0x00000078,
|
||||
.reo1_ring_base_lsb = 0x00000500,
|
||||
.reo1_ring_base_msb = 0x00000504,
|
||||
.reo1_ring_id = 0x00000508,
|
||||
.reo1_ring_misc = 0x00000510,
|
||||
.reo1_ring_hp_addr_lsb = 0x00000514,
|
||||
.reo1_ring_hp_addr_msb = 0x00000518,
|
||||
.reo1_ring_producer_int_setup = 0x00000524,
|
||||
.reo1_ring_msi1_base_lsb = 0x00000548,
|
||||
.reo1_ring_msi1_base_msb = 0x0000054C,
|
||||
.reo1_ring_msi1_data = 0x00000550,
|
||||
.reo1_aging_thres_ix0 = 0x00000B28,
|
||||
.reo1_aging_thres_ix1 = 0x00000B2C,
|
||||
.reo1_aging_thres_ix2 = 0x00000B30,
|
||||
.reo1_aging_thres_ix3 = 0x00000B34,
|
||||
|
||||
/* REO Exception ring address */
|
||||
.reo2_sw0_ring_base = 0x000008c0,
|
||||
|
||||
/* REO Reinject ring address */
|
||||
.sw2reo_ring_base = 0x00000320,
|
||||
.sw2reo1_ring_base = 0x00000398,
|
||||
|
||||
/* REO cmd ring address */
|
||||
.reo_cmd_ring_base = 0x000002A8,
|
||||
|
||||
/* REO status ring address */
|
||||
.reo_status_ring_base = 0x00000aa0,
|
||||
|
||||
/* WBM idle link ring address */
|
||||
.wbm_idle_ring_base_lsb = 0x00000d3c,
|
||||
.wbm_idle_ring_misc_addr = 0x00000d4c,
|
||||
.wbm_r0_idle_list_cntl_addr = 0x00000240,
|
||||
.wbm_r0_idle_list_size_addr = 0x00000244,
|
||||
.wbm_scattered_ring_base_lsb = 0x00000250,
|
||||
.wbm_scattered_ring_base_msb = 0x00000254,
|
||||
.wbm_scattered_desc_head_info_ix0 = 0x00000260,
|
||||
.wbm_scattered_desc_head_info_ix1 = 0x00000264,
|
||||
.wbm_scattered_desc_tail_info_ix0 = 0x00000270,
|
||||
.wbm_scattered_desc_tail_info_ix1 = 0x00000274,
|
||||
.wbm_scattered_desc_ptr_hp_addr = 0x0000027c,
|
||||
|
||||
/* SW2WBM release ring address */
|
||||
.wbm_sw_release_ring_base_lsb = 0x0000037c,
|
||||
|
||||
/* WBM2SW release ring address */
|
||||
.wbm0_release_ring_base_lsb = 0x00000e08,
|
||||
.wbm1_release_ring_base_lsb = 0x00000e80,
|
||||
|
||||
/* PPE release ring address */
|
||||
.ppe_rel_ring_base = 0x0000046c,
|
||||
|
||||
/* CE address */
|
||||
.umac_ce0_src_reg_base = 0x00200000 -
|
||||
HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.umac_ce0_dest_reg_base = 0x00201000 -
|
||||
HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.umac_ce1_src_reg_base = 0x00202000 -
|
||||
HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.umac_ce1_dest_reg_base = 0x00203000 -
|
||||
HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
};
|
||||
|
||||
static inline
|
||||
bool ath12k_hal_rx_desc_get_first_msdu_qcn9274(struct hal_rx_desc *desc)
|
||||
{
|
||||
|
||||
@@ -17,6 +17,7 @@ extern const struct hal_ops hal_qcn9274_ops;
|
||||
extern const struct ath12k_hw_regs qcn9274_v1_regs;
|
||||
extern const struct ath12k_hw_regs qcn9274_v2_regs;
|
||||
extern const struct ath12k_hw_regs ipq5332_regs;
|
||||
extern const struct ath12k_hw_regs ipq5424_regs;
|
||||
extern const struct ath12k_hal_tcl_to_wbm_rbm_map
|
||||
ath12k_hal_tcl_to_wbm_rbm_map_qcn9274[DP_TCL_NUM_RING_MAX];
|
||||
extern const struct ath12k_hw_hal_params ath12k_hw_hal_params_qcn9274;
|
||||
|
||||
@@ -329,9 +329,15 @@ static const struct ath12k_hw_ring_mask ath12k_wifi7_hw_ring_mask_wcn7850 = {
|
||||
};
|
||||
|
||||
static const struct ce_ie_addr ath12k_wifi7_ce_ie_addr_ipq5332 = {
|
||||
.ie1_reg_addr = CE_HOST_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
.ie2_reg_addr = CE_HOST_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
.ie3_reg_addr = CE_HOST_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
.ie1_reg_addr = CE_HOST_IPQ5332_IE_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
.ie2_reg_addr = CE_HOST_IPQ5332_IE_2_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
.ie3_reg_addr = CE_HOST_IPQ5332_IE_3_ADDRESS - HAL_IPQ5332_CE_WFSS_REG_BASE,
|
||||
};
|
||||
|
||||
static const struct ce_ie_addr ath12k_wifi7_ce_ie_addr_ipq5424 = {
|
||||
.ie1_reg_addr = CE_HOST_IPQ5424_IE_ADDRESS - HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.ie2_reg_addr = CE_HOST_IPQ5424_IE_2_ADDRESS - HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.ie3_reg_addr = CE_HOST_IPQ5424_IE_3_ADDRESS - HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
};
|
||||
|
||||
static const struct ce_remap ath12k_wifi7_ce_remap_ipq5332 = {
|
||||
@@ -340,6 +346,12 @@ static const struct ce_remap ath12k_wifi7_ce_remap_ipq5332 = {
|
||||
.cmem_offset = HAL_SEQ_WCSS_CMEM_OFFSET,
|
||||
};
|
||||
|
||||
static const struct ce_remap ath12k_wifi7_ce_remap_ipq5424 = {
|
||||
.base = HAL_IPQ5424_CE_WFSS_REG_BASE,
|
||||
.size = HAL_IPQ5424_CE_SIZE,
|
||||
.cmem_offset = HAL_SEQ_WCSS_CMEM_OFFSET,
|
||||
};
|
||||
|
||||
static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
|
||||
{
|
||||
.name = "qcn9274 hw1.0",
|
||||
@@ -753,6 +765,85 @@ static const struct ath12k_hw_params ath12k_wifi7_hw_params[] = {
|
||||
|
||||
.dp_primary_link_only = false,
|
||||
},
|
||||
{
|
||||
.name = "ipq5424 hw1.0",
|
||||
.hw_rev = ATH12K_HW_IPQ5424_HW10,
|
||||
.fw = {
|
||||
.dir = "IPQ5424/hw1.0",
|
||||
.board_size = 256 * 1024,
|
||||
.cal_offset = 128 * 1024,
|
||||
.m3_loader = ath12k_m3_fw_loader_remoteproc,
|
||||
.download_aux_ucode = false,
|
||||
},
|
||||
.max_radios = 1,
|
||||
.single_pdev_only = false,
|
||||
.qmi_service_ins_id = ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ5332,
|
||||
.internal_sleep_clock = false,
|
||||
|
||||
.hw_ops = &qcn9274_ops,
|
||||
.ring_mask = &ath12k_wifi7_hw_ring_mask_ipq5332,
|
||||
|
||||
.host_ce_config = ath12k_wifi7_host_ce_config_ipq5332,
|
||||
.ce_count = 12,
|
||||
.target_ce_config = ath12k_wifi7_target_ce_config_wlan_ipq5332,
|
||||
.target_ce_count = 12,
|
||||
.svc_to_ce_map =
|
||||
ath12k_wifi7_target_service_to_ce_map_wlan_ipq5332,
|
||||
.svc_to_ce_map_len = 18,
|
||||
|
||||
.rxdma1_enable = true,
|
||||
.num_rxdma_per_pdev = 1,
|
||||
.num_rxdma_dst_ring = 0,
|
||||
.rx_mac_buf_ring = false,
|
||||
.vdev_start_delay = false,
|
||||
|
||||
.interface_modes = BIT(NL80211_IFTYPE_STATION) |
|
||||
BIT(NL80211_IFTYPE_AP) |
|
||||
BIT(NL80211_IFTYPE_MESH_POINT),
|
||||
.supports_monitor = true,
|
||||
|
||||
.idle_ps = false,
|
||||
.download_calib = true,
|
||||
.supports_suspend = false,
|
||||
.tcl_ring_retry = true,
|
||||
.reoq_lut_support = false,
|
||||
.supports_shadow_regs = false,
|
||||
|
||||
.num_tcl_banks = 48,
|
||||
.max_tx_ring = 4,
|
||||
|
||||
.mhi_config = NULL,
|
||||
|
||||
.wmi_init = &ath12k_wifi7_wmi_init_qcn9274,
|
||||
|
||||
.qmi_cnss_feature_bitmap = BIT(CNSS_QDSS_CFG_MISS_V01),
|
||||
|
||||
.rfkill_pin = 0,
|
||||
.rfkill_cfg = 0,
|
||||
.rfkill_on_level = 0,
|
||||
|
||||
.rddm_size = 0,
|
||||
|
||||
.def_num_link = 0,
|
||||
.max_mlo_peer = 256,
|
||||
|
||||
.otp_board_id_register = 0,
|
||||
|
||||
.supports_sta_ps = false,
|
||||
|
||||
.acpi_guid = NULL,
|
||||
.supports_dynamic_smps_6ghz = false,
|
||||
.iova_mask = 0,
|
||||
.supports_aspm = false,
|
||||
|
||||
.ce_ie_addr = &ath12k_wifi7_ce_ie_addr_ipq5424,
|
||||
.ce_remap = &ath12k_wifi7_ce_remap_ipq5424,
|
||||
.bdf_addr_offset = 0x940000,
|
||||
|
||||
.current_cc_support = false,
|
||||
|
||||
.dp_primary_link_only = true,
|
||||
},
|
||||
};
|
||||
|
||||
/* Note: called under rcu_read_lock() */
|
||||
|
||||
@@ -2226,34 +2226,20 @@ static struct at76_priv *at76_alloc_new_device(struct usb_device *udev)
|
||||
static int at76_alloc_urbs(struct at76_priv *priv,
|
||||
struct usb_interface *interface)
|
||||
{
|
||||
struct usb_endpoint_descriptor *endpoint, *ep_in, *ep_out;
|
||||
int i;
|
||||
struct usb_endpoint_descriptor *ep_in, *ep_out;
|
||||
int buffer_size;
|
||||
struct usb_host_interface *iface_desc;
|
||||
int ret;
|
||||
|
||||
at76_dbg(DBG_PROC_ENTRY, "%s: ENTER", __func__);
|
||||
|
||||
at76_dbg(DBG_URB, "%s: NumEndpoints %d ", __func__,
|
||||
interface->cur_altsetting->desc.bNumEndpoints);
|
||||
|
||||
ep_in = NULL;
|
||||
ep_out = NULL;
|
||||
iface_desc = interface->cur_altsetting;
|
||||
for (i = 0; i < iface_desc->desc.bNumEndpoints; i++) {
|
||||
endpoint = &iface_desc->endpoint[i].desc;
|
||||
|
||||
at76_dbg(DBG_URB, "%s: %d. endpoint: addr 0x%x attr 0x%x",
|
||||
__func__, i, endpoint->bEndpointAddress,
|
||||
endpoint->bmAttributes);
|
||||
|
||||
if (!ep_in && usb_endpoint_is_bulk_in(endpoint))
|
||||
ep_in = endpoint;
|
||||
|
||||
if (!ep_out && usb_endpoint_is_bulk_out(endpoint))
|
||||
ep_out = endpoint;
|
||||
}
|
||||
|
||||
if (!ep_in || !ep_out) {
|
||||
ret = usb_find_common_endpoints(iface_desc, &ep_in, &ep_out, NULL, NULL);
|
||||
if (ret) {
|
||||
dev_err(&interface->dev, "bulk endpoints missing\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
@@ -1007,18 +1007,33 @@ static int brcmf_chip_recognition(struct brcmf_chip_priv *ci)
|
||||
|
||||
core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON,
|
||||
SI_ENUM_BASE_DEFAULT, 0);
|
||||
if (IS_ERR(core))
|
||||
return PTR_ERR(core);
|
||||
|
||||
brcmf_chip_sb_corerev(ci, core);
|
||||
core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV,
|
||||
BCM4329_CORE_BUS_BASE, 0);
|
||||
if (IS_ERR(core))
|
||||
return PTR_ERR(core);
|
||||
|
||||
brcmf_chip_sb_corerev(ci, core);
|
||||
core = brcmf_chip_add_core(ci, BCMA_CORE_INTERNAL_MEM,
|
||||
BCM4329_CORE_SOCRAM_BASE, 0);
|
||||
if (IS_ERR(core))
|
||||
return PTR_ERR(core);
|
||||
|
||||
brcmf_chip_sb_corerev(ci, core);
|
||||
core = brcmf_chip_add_core(ci, BCMA_CORE_ARM_CM3,
|
||||
BCM4329_CORE_ARM_BASE, 0);
|
||||
if (IS_ERR(core))
|
||||
return PTR_ERR(core);
|
||||
|
||||
brcmf_chip_sb_corerev(ci, core);
|
||||
|
||||
core = brcmf_chip_add_core(ci, BCMA_CORE_80211, 0x18001000, 0);
|
||||
if (IS_ERR(core))
|
||||
return PTR_ERR(core);
|
||||
|
||||
brcmf_chip_sb_corerev(ci, core);
|
||||
} else if (socitype == SOCI_AI) {
|
||||
ci->iscoreup = brcmf_chip_ai_iscoreup;
|
||||
|
||||
@@ -670,6 +670,9 @@ static int brcmf_fw_request_firmware(const struct firmware **fw,
|
||||
}
|
||||
|
||||
fallback:
|
||||
if (cur->flags & BRCMF_FW_REQF_OPTIONAL)
|
||||
return firmware_request_nowarn(fw, cur->path, fwctx->dev);
|
||||
|
||||
return request_firmware(fw, cur->path, fwctx->dev);
|
||||
}
|
||||
|
||||
@@ -714,9 +717,10 @@ static void brcmf_fw_request_done_alt_path(const struct firmware *fw, void *ctx)
|
||||
if (!alt_path)
|
||||
goto fallback;
|
||||
|
||||
ret = request_firmware_nowait(THIS_MODULE, true, alt_path,
|
||||
fwctx->dev, GFP_KERNEL, fwctx,
|
||||
brcmf_fw_request_done_alt_path);
|
||||
ret = firmware_request_nowait_nowarn(THIS_MODULE,
|
||||
alt_path, fwctx->dev,
|
||||
GFP_KERNEL, fwctx,
|
||||
brcmf_fw_request_done_alt_path);
|
||||
kfree(alt_path);
|
||||
|
||||
if (ret < 0)
|
||||
@@ -779,9 +783,10 @@ int brcmf_fw_get_firmwares(struct device *dev, struct brcmf_fw_request *req,
|
||||
fwctx->req->board_types[0]);
|
||||
if (alt_path) {
|
||||
fwctx->board_index++;
|
||||
ret = request_firmware_nowait(THIS_MODULE, true, alt_path,
|
||||
fwctx->dev, GFP_KERNEL, fwctx,
|
||||
brcmf_fw_request_done_alt_path);
|
||||
ret = firmware_request_nowait_nowarn(THIS_MODULE,
|
||||
alt_path, fwctx->dev,
|
||||
GFP_KERNEL, fwctx,
|
||||
brcmf_fw_request_done_alt_path);
|
||||
kfree(alt_path);
|
||||
} else {
|
||||
ret = request_firmware_nowait(THIS_MODULE, true, first->path,
|
||||
|
||||
@@ -128,7 +128,9 @@ int brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type,
|
||||
if (err)
|
||||
brcmf_err("failed to get OF country code map (err=%d)\n", err);
|
||||
|
||||
of_get_mac_address(np, settings->mac);
|
||||
err = of_get_mac_address(np, settings->mac);
|
||||
if (err == -EPROBE_DEFER)
|
||||
return err;
|
||||
|
||||
if (bus_type != BRCMF_BUSTYPE_SDIO)
|
||||
return 0;
|
||||
|
||||
@@ -154,7 +154,6 @@ config LIBIPW
|
||||
depends on PCI && CFG80211
|
||||
select WIRELESS_EXT
|
||||
select CRYPTO
|
||||
select CRYPTO_MICHAEL_MIC
|
||||
select CRYPTO_LIB_ARC4
|
||||
select CRC32
|
||||
help
|
||||
|
||||
@@ -25,8 +25,6 @@
|
||||
#include <linux/ieee80211.h>
|
||||
#include <net/iw_handler.h>
|
||||
#include <crypto/arc4.h>
|
||||
#include <crypto/hash.h>
|
||||
#include <linux/crypto.h>
|
||||
#include <linux/crc32.h>
|
||||
#include "libipw.h"
|
||||
|
||||
@@ -57,11 +55,6 @@ struct libipw_tkip_data {
|
||||
|
||||
struct arc4_ctx rx_ctx_arc4;
|
||||
struct arc4_ctx tx_ctx_arc4;
|
||||
struct crypto_shash *rx_tfm_michael;
|
||||
struct crypto_shash *tx_tfm_michael;
|
||||
|
||||
/* scratch buffers for virt_to_page() (crypto API) */
|
||||
u8 rx_hdr[16], tx_hdr[16];
|
||||
|
||||
unsigned long flags;
|
||||
};
|
||||
@@ -89,41 +82,14 @@ static void *libipw_tkip_init(int key_idx)
|
||||
|
||||
priv = kzalloc_obj(*priv, GFP_ATOMIC);
|
||||
if (priv == NULL)
|
||||
goto fail;
|
||||
return priv;
|
||||
|
||||
priv->key_idx = key_idx;
|
||||
|
||||
priv->tx_tfm_michael = crypto_alloc_shash("michael_mic", 0, 0);
|
||||
if (IS_ERR(priv->tx_tfm_michael)) {
|
||||
priv->tx_tfm_michael = NULL;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
priv->rx_tfm_michael = crypto_alloc_shash("michael_mic", 0, 0);
|
||||
if (IS_ERR(priv->rx_tfm_michael)) {
|
||||
priv->rx_tfm_michael = NULL;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
return priv;
|
||||
|
||||
fail:
|
||||
if (priv) {
|
||||
crypto_free_shash(priv->tx_tfm_michael);
|
||||
crypto_free_shash(priv->rx_tfm_michael);
|
||||
kfree(priv);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void libipw_tkip_deinit(void *priv)
|
||||
{
|
||||
struct libipw_tkip_data *_priv = priv;
|
||||
if (_priv) {
|
||||
crypto_free_shash(_priv->tx_tfm_michael);
|
||||
crypto_free_shash(_priv->rx_tfm_michael);
|
||||
}
|
||||
kfree_sensitive(priv);
|
||||
}
|
||||
|
||||
@@ -464,73 +430,6 @@ static int libipw_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
|
||||
return keyidx;
|
||||
}
|
||||
|
||||
static int michael_mic(struct crypto_shash *tfm_michael, u8 *key, u8 *hdr,
|
||||
u8 *data, size_t data_len, u8 *mic)
|
||||
{
|
||||
SHASH_DESC_ON_STACK(desc, tfm_michael);
|
||||
int err;
|
||||
|
||||
if (tfm_michael == NULL) {
|
||||
pr_warn("%s(): tfm_michael == NULL\n", __func__);
|
||||
return -1;
|
||||
}
|
||||
|
||||
desc->tfm = tfm_michael;
|
||||
|
||||
if (crypto_shash_setkey(tfm_michael, key, 8))
|
||||
return -1;
|
||||
|
||||
err = crypto_shash_init(desc);
|
||||
if (err)
|
||||
goto out;
|
||||
err = crypto_shash_update(desc, hdr, 16);
|
||||
if (err)
|
||||
goto out;
|
||||
err = crypto_shash_update(desc, data, data_len);
|
||||
if (err)
|
||||
goto out;
|
||||
err = crypto_shash_final(desc, mic);
|
||||
|
||||
out:
|
||||
shash_desc_zero(desc);
|
||||
return err;
|
||||
}
|
||||
|
||||
static void michael_mic_hdr(struct sk_buff *skb, u8 * hdr)
|
||||
{
|
||||
struct ieee80211_hdr *hdr11;
|
||||
|
||||
hdr11 = (struct ieee80211_hdr *)skb->data;
|
||||
|
||||
switch (le16_to_cpu(hdr11->frame_control) &
|
||||
(IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS)) {
|
||||
case IEEE80211_FCTL_TODS:
|
||||
memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
|
||||
memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
|
||||
break;
|
||||
case IEEE80211_FCTL_FROMDS:
|
||||
memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
|
||||
memcpy(hdr + ETH_ALEN, hdr11->addr3, ETH_ALEN); /* SA */
|
||||
break;
|
||||
case IEEE80211_FCTL_FROMDS | IEEE80211_FCTL_TODS:
|
||||
memcpy(hdr, hdr11->addr3, ETH_ALEN); /* DA */
|
||||
memcpy(hdr + ETH_ALEN, hdr11->addr4, ETH_ALEN); /* SA */
|
||||
break;
|
||||
default:
|
||||
memcpy(hdr, hdr11->addr1, ETH_ALEN); /* DA */
|
||||
memcpy(hdr + ETH_ALEN, hdr11->addr2, ETH_ALEN); /* SA */
|
||||
break;
|
||||
}
|
||||
|
||||
if (ieee80211_is_data_qos(hdr11->frame_control)) {
|
||||
hdr[12] = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(hdr11)))
|
||||
& IEEE80211_QOS_CTL_TID_MASK;
|
||||
} else
|
||||
hdr[12] = 0; /* priority */
|
||||
|
||||
hdr[13] = hdr[14] = hdr[15] = 0; /* reserved */
|
||||
}
|
||||
|
||||
static int libipw_michael_mic_add(struct sk_buff *skb, int hdr_len,
|
||||
void *priv)
|
||||
{
|
||||
@@ -544,12 +443,9 @@ static int libipw_michael_mic_add(struct sk_buff *skb, int hdr_len,
|
||||
return -1;
|
||||
}
|
||||
|
||||
michael_mic_hdr(skb, tkey->tx_hdr);
|
||||
pos = skb_put(skb, 8);
|
||||
if (michael_mic(tkey->tx_tfm_michael, &tkey->key[16], tkey->tx_hdr,
|
||||
skb->data + hdr_len, skb->len - 8 - hdr_len, pos))
|
||||
return -1;
|
||||
|
||||
michael_mic(&tkey->key[16], (struct ieee80211_hdr *)skb->data,
|
||||
skb->data + hdr_len, skb->len - 8 - hdr_len, pos);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -583,10 +479,8 @@ static int libipw_michael_mic_verify(struct sk_buff *skb, int keyidx,
|
||||
if (!tkey->key_set)
|
||||
return -1;
|
||||
|
||||
michael_mic_hdr(skb, tkey->rx_hdr);
|
||||
if (michael_mic(tkey->rx_tfm_michael, &tkey->key[24], tkey->rx_hdr,
|
||||
skb->data + hdr_len, skb->len - 8 - hdr_len, mic))
|
||||
return -1;
|
||||
michael_mic(&tkey->key[24], (struct ieee80211_hdr *)skb->data,
|
||||
skb->data + hdr_len, skb->len - 8 - hdr_len, mic);
|
||||
if (memcmp(mic, skb->data + skb->len - 8, 8) != 0) {
|
||||
struct ieee80211_hdr *hdr;
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
@@ -614,17 +508,13 @@ static int libipw_tkip_set_key(void *key, int len, u8 * seq, void *priv)
|
||||
{
|
||||
struct libipw_tkip_data *tkey = priv;
|
||||
int keyidx;
|
||||
struct crypto_shash *tfm = tkey->tx_tfm_michael;
|
||||
struct arc4_ctx *tfm2 = &tkey->tx_ctx_arc4;
|
||||
struct crypto_shash *tfm3 = tkey->rx_tfm_michael;
|
||||
struct arc4_ctx *tfm4 = &tkey->rx_ctx_arc4;
|
||||
|
||||
keyidx = tkey->key_idx;
|
||||
memset(tkey, 0, sizeof(*tkey));
|
||||
tkey->key_idx = keyidx;
|
||||
tkey->tx_tfm_michael = tfm;
|
||||
tkey->tx_ctx_arc4 = *tfm2;
|
||||
tkey->rx_tfm_michael = tfm3;
|
||||
tkey->rx_ctx_arc4 = *tfm4;
|
||||
if (len == TKIP_KEY_LEN) {
|
||||
memcpy(tkey->key, key, TKIP_KEY_LEN);
|
||||
|
||||
@@ -979,9 +979,10 @@ il3945_rx_allocate(struct il_priv *il, gfp_t priority)
|
||||
struct page *page;
|
||||
dma_addr_t page_dma;
|
||||
unsigned long flags;
|
||||
gfp_t gfp_mask = priority;
|
||||
|
||||
while (1) {
|
||||
gfp_t gfp_mask = priority;
|
||||
|
||||
spin_lock_irqsave(&rxq->lock, flags);
|
||||
if (list_empty(&rxq->rx_used)) {
|
||||
spin_unlock_irqrestore(&rxq->lock, flags);
|
||||
@@ -1002,9 +1003,9 @@ il3945_rx_allocate(struct il_priv *il, gfp_t priority)
|
||||
D_INFO("Failed to allocate SKB buffer.\n");
|
||||
if (rxq->free_count <= RX_LOW_WATERMARK &&
|
||||
net_ratelimit())
|
||||
IL_ERR("Failed to allocate SKB buffer with %0x."
|
||||
IL_ERR("Failed to allocate SKB buffer with %pGg. "
|
||||
"Only %u free buffers remaining.\n",
|
||||
priority, rxq->free_count);
|
||||
&gfp_mask, rxq->free_count);
|
||||
/* We don't reschedule replenish work here -- we will
|
||||
* call the restock method and if it still needs
|
||||
* more buffers it will schedule replenish */
|
||||
|
||||
@@ -193,13 +193,12 @@ static void if_usb_reset_olpc_card(struct lbs_private *priv)
|
||||
static int if_usb_probe(struct usb_interface *intf,
|
||||
const struct usb_device_id *id)
|
||||
{
|
||||
struct usb_endpoint_descriptor *ep_in, *ep_out;
|
||||
struct usb_device *udev;
|
||||
struct usb_host_interface *iface_desc;
|
||||
struct usb_endpoint_descriptor *endpoint;
|
||||
struct lbs_private *priv;
|
||||
struct if_usb_card *cardp;
|
||||
int r = -ENOMEM;
|
||||
int i;
|
||||
|
||||
udev = interface_to_usbdev(intf);
|
||||
|
||||
@@ -224,27 +223,27 @@ static int if_usb_probe(struct usb_interface *intf,
|
||||
init_usb_anchor(&cardp->rx_submitted);
|
||||
init_usb_anchor(&cardp->tx_submitted);
|
||||
|
||||
for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
|
||||
endpoint = &iface_desc->endpoint[i].desc;
|
||||
if (usb_endpoint_is_bulk_in(endpoint)) {
|
||||
cardp->ep_in_size = le16_to_cpu(endpoint->wMaxPacketSize);
|
||||
cardp->ep_in = usb_endpoint_num(endpoint);
|
||||
|
||||
lbs_deb_usbd(&udev->dev, "in_endpoint = %d\n", cardp->ep_in);
|
||||
lbs_deb_usbd(&udev->dev, "Bulk in size is %d\n", cardp->ep_in_size);
|
||||
|
||||
} else if (usb_endpoint_is_bulk_out(endpoint)) {
|
||||
cardp->ep_out_size = le16_to_cpu(endpoint->wMaxPacketSize);
|
||||
cardp->ep_out = usb_endpoint_num(endpoint);
|
||||
|
||||
lbs_deb_usbd(&udev->dev, "out_endpoint = %d\n", cardp->ep_out);
|
||||
lbs_deb_usbd(&udev->dev, "Bulk out size is %d\n", cardp->ep_out_size);
|
||||
}
|
||||
}
|
||||
if (!cardp->ep_out_size || !cardp->ep_in_size) {
|
||||
if (usb_find_common_endpoints_reverse(iface_desc, &ep_in, &ep_out, NULL, NULL)) {
|
||||
lbs_deb_usbd(&udev->dev, "Endpoints not found\n");
|
||||
goto dealloc;
|
||||
}
|
||||
|
||||
cardp->ep_in_size = usb_endpoint_maxp(ep_in);
|
||||
cardp->ep_in = usb_endpoint_num(ep_in);
|
||||
|
||||
lbs_deb_usbd(&udev->dev, "in_endpoint = %d\n", cardp->ep_in);
|
||||
lbs_deb_usbd(&udev->dev, "Bulk in size is %d\n", cardp->ep_in_size);
|
||||
|
||||
cardp->ep_out_size = usb_endpoint_maxp(ep_out);
|
||||
cardp->ep_out = usb_endpoint_num(ep_out);
|
||||
|
||||
lbs_deb_usbd(&udev->dev, "out_endpoint = %d\n", cardp->ep_out);
|
||||
lbs_deb_usbd(&udev->dev, "Bulk out size is %d\n", cardp->ep_out_size);
|
||||
|
||||
if (!cardp->ep_out_size || !cardp->ep_in_size) {
|
||||
lbs_deb_usbd(&udev->dev, "Endpoints not valid\n");
|
||||
goto dealloc;
|
||||
}
|
||||
if (!(cardp->rx_urb = usb_alloc_urb(0, GFP_KERNEL))) {
|
||||
lbs_deb_usbd(&udev->dev, "Rx URB allocation failed\n");
|
||||
goto dealloc;
|
||||
|
||||
@@ -144,12 +144,12 @@ static const struct lbtf_ops if_usb_ops = {
|
||||
static int if_usb_probe(struct usb_interface *intf,
|
||||
const struct usb_device_id *id)
|
||||
{
|
||||
struct usb_endpoint_descriptor *ep_in, *ep_out;
|
||||
struct usb_device *udev;
|
||||
struct usb_host_interface *iface_desc;
|
||||
struct usb_endpoint_descriptor *endpoint;
|
||||
struct lbtf_private *priv;
|
||||
struct if_usb_card *cardp;
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
lbtf_deb_enter(LBTF_DEB_USB);
|
||||
udev = interface_to_usbdev(intf);
|
||||
@@ -171,31 +171,27 @@ static int if_usb_probe(struct usb_interface *intf,
|
||||
udev->descriptor.bDeviceSubClass,
|
||||
udev->descriptor.bDeviceProtocol);
|
||||
|
||||
for (i = 0; i < iface_desc->desc.bNumEndpoints; ++i) {
|
||||
endpoint = &iface_desc->endpoint[i].desc;
|
||||
if (usb_endpoint_is_bulk_in(endpoint)) {
|
||||
cardp->ep_in_size =
|
||||
le16_to_cpu(endpoint->wMaxPacketSize);
|
||||
cardp->ep_in = usb_endpoint_num(endpoint);
|
||||
|
||||
lbtf_deb_usbd(&udev->dev, "in_endpoint = %d\n",
|
||||
cardp->ep_in);
|
||||
lbtf_deb_usbd(&udev->dev, "Bulk in size is %d\n",
|
||||
cardp->ep_in_size);
|
||||
} else if (usb_endpoint_is_bulk_out(endpoint)) {
|
||||
cardp->ep_out_size =
|
||||
le16_to_cpu(endpoint->wMaxPacketSize);
|
||||
cardp->ep_out = usb_endpoint_num(endpoint);
|
||||
|
||||
lbtf_deb_usbd(&udev->dev, "out_endpoint = %d\n",
|
||||
cardp->ep_out);
|
||||
lbtf_deb_usbd(&udev->dev, "Bulk out size is %d\n",
|
||||
cardp->ep_out_size);
|
||||
}
|
||||
}
|
||||
if (!cardp->ep_out_size || !cardp->ep_in_size) {
|
||||
ret = usb_find_common_endpoints_reverse(iface_desc, &ep_in, &ep_out,
|
||||
NULL, NULL);
|
||||
if (ret) {
|
||||
lbtf_deb_usbd(&udev->dev, "Endpoints not found\n");
|
||||
/* Endpoints not found */
|
||||
goto dealloc;
|
||||
}
|
||||
|
||||
cardp->ep_in_size = usb_endpoint_maxp(ep_in);
|
||||
cardp->ep_in = usb_endpoint_num(ep_in);
|
||||
|
||||
lbtf_deb_usbd(&udev->dev, "in_endpoint = %d\n", cardp->ep_in);
|
||||
lbtf_deb_usbd(&udev->dev, "Bulk in size is %d\n", cardp->ep_in_size);
|
||||
|
||||
cardp->ep_out_size = usb_endpoint_maxp(ep_out);
|
||||
cardp->ep_out = usb_endpoint_num(ep_out);
|
||||
|
||||
lbtf_deb_usbd(&udev->dev, "out_endpoint = %d\n", cardp->ep_out);
|
||||
lbtf_deb_usbd(&udev->dev, "Bulk out size is %d\n", cardp->ep_out_size);
|
||||
|
||||
if (!cardp->ep_out_size || !cardp->ep_in_size) {
|
||||
lbtf_deb_usbd(&udev->dev, "Endpoints not valid\n");
|
||||
goto dealloc;
|
||||
}
|
||||
|
||||
|
||||
@@ -1123,7 +1123,7 @@ int wilc_add_ptk(struct wilc_vif *vif, const u8 *ptk, u8 ptk_key_len,
|
||||
wid_list[0].size = sizeof(char);
|
||||
wid_list[0].val = (s8 *)&cipher_mode;
|
||||
|
||||
key_buf = kzalloc(sizeof(*key_buf) + t_key_len, GFP_KERNEL);
|
||||
key_buf = kzalloc_flex(*key_buf, key, t_key_len);
|
||||
if (!key_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -1151,7 +1151,7 @@ int wilc_add_ptk(struct wilc_vif *vif, const u8 *ptk, u8 ptk_key_len,
|
||||
struct wid wid;
|
||||
struct wilc_sta_wpa_ptk *key_buf;
|
||||
|
||||
key_buf = kzalloc(sizeof(*key_buf) + t_key_len, GFP_KERNEL);
|
||||
key_buf = kzalloc_flex(*key_buf, key, t_key_len);
|
||||
if (!key_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -1186,7 +1186,7 @@ int wilc_add_igtk(struct wilc_vif *vif, const u8 *igtk, u8 igtk_key_len,
|
||||
struct wid wid;
|
||||
struct wilc_wpa_igtk *key_buf;
|
||||
|
||||
key_buf = kzalloc(sizeof(*key_buf) + t_key_len, GFP_KERNEL);
|
||||
key_buf = kzalloc_flex(*key_buf, key, t_key_len);
|
||||
if (!key_buf)
|
||||
return -ENOMEM;
|
||||
|
||||
@@ -1217,7 +1217,7 @@ int wilc_add_rx_gtk(struct wilc_vif *vif, const u8 *rx_gtk, u8 gtk_key_len,
|
||||
struct wilc_gtk_key *gtk_key;
|
||||
int t_key_len = gtk_key_len + WILC_RX_MIC_KEY_LEN + WILC_TX_MIC_KEY_LEN;
|
||||
|
||||
gtk_key = kzalloc(sizeof(*gtk_key) + t_key_len, GFP_KERNEL);
|
||||
gtk_key = kzalloc_flex(*gtk_key, key, t_key_len);
|
||||
if (!gtk_key)
|
||||
return -ENOMEM;
|
||||
|
||||
|
||||
@@ -1475,8 +1475,6 @@ static int rtl8187_probe(struct usb_interface *intf,
|
||||
usb_set_intfdata(intf, dev);
|
||||
priv->udev = udev;
|
||||
|
||||
usb_get_dev(udev);
|
||||
|
||||
skb_queue_head_init(&priv->rx_queue);
|
||||
|
||||
BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
|
||||
@@ -1663,7 +1661,6 @@ static int rtl8187_probe(struct usb_interface *intf,
|
||||
err_free_dmabuf:
|
||||
kfree(priv->io_dmabuf);
|
||||
usb_set_intfdata(intf, NULL);
|
||||
usb_put_dev(udev);
|
||||
err_free_dev:
|
||||
ieee80211_free_hw(dev);
|
||||
return err;
|
||||
@@ -1685,7 +1682,6 @@ static void rtl8187_disconnect(struct usb_interface *intf)
|
||||
|
||||
priv = dev->priv;
|
||||
usb_reset_device(priv->udev);
|
||||
usb_put_dev(interface_to_usbdev(intf));
|
||||
kfree(priv->io_dmabuf);
|
||||
ieee80211_free_hw(dev);
|
||||
}
|
||||
|
||||
@@ -4697,20 +4697,6 @@ static const struct ieee80211_rate rtl8xxxu_legacy_ratetable[] = {
|
||||
{.bitrate = 540, .hw_value = 0x0b,},
|
||||
};
|
||||
|
||||
static void rtl8xxxu_desc_to_mcsrate(u16 rate, u8 *mcs, u8 *nss)
|
||||
{
|
||||
if (rate <= DESC_RATE_54M)
|
||||
return;
|
||||
|
||||
if (rate >= DESC_RATE_MCS0 && rate <= DESC_RATE_MCS15) {
|
||||
if (rate < DESC_RATE_MCS8)
|
||||
*nss = 1;
|
||||
else
|
||||
*nss = 2;
|
||||
*mcs = rate - DESC_RATE_MCS0;
|
||||
}
|
||||
}
|
||||
|
||||
static void rtl8xxxu_set_basic_rates(struct rtl8xxxu_priv *priv, u32 rate_cfg)
|
||||
{
|
||||
struct ieee80211_hw *hw = priv->hw;
|
||||
@@ -4820,23 +4806,25 @@ static void rtl8xxxu_set_aifs(struct rtl8xxxu_priv *priv, u8 slot_time)
|
||||
void rtl8xxxu_update_ra_report(struct rtl8xxxu_ra_report *rarpt,
|
||||
u8 rate, u8 sgi, u8 bw)
|
||||
{
|
||||
u8 mcs, nss;
|
||||
|
||||
rarpt->txrate.flags = 0;
|
||||
|
||||
if (rate <= DESC_RATE_54M) {
|
||||
rarpt->txrate.legacy = rtl8xxxu_legacy_ratetable[rate].bitrate;
|
||||
} else {
|
||||
rtl8xxxu_desc_to_mcsrate(rate, &mcs, &nss);
|
||||
} else if (rate >= DESC_RATE_MCS0 && rate <= DESC_RATE_MCS15) {
|
||||
rarpt->txrate.flags |= RATE_INFO_FLAGS_MCS;
|
||||
if (rate < DESC_RATE_MCS8)
|
||||
rarpt->txrate.nss = 1;
|
||||
else
|
||||
rarpt->txrate.nss = 2;
|
||||
|
||||
rarpt->txrate.mcs = mcs;
|
||||
rarpt->txrate.nss = nss;
|
||||
rarpt->txrate.mcs = rate - DESC_RATE_MCS0;
|
||||
|
||||
if (sgi)
|
||||
rarpt->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
|
||||
|
||||
rarpt->txrate.bw = bw;
|
||||
} else {
|
||||
return;
|
||||
}
|
||||
|
||||
rarpt->bit_rate = cfg80211_calculate_bitrate(&rarpt->txrate);
|
||||
@@ -7698,11 +7686,12 @@ static int rtl8xxxu_probe(struct usb_interface *interface,
|
||||
int ret;
|
||||
int untested = 1;
|
||||
|
||||
udev = usb_get_dev(interface_to_usbdev(interface));
|
||||
udev = interface_to_usbdev(interface);
|
||||
|
||||
switch (id->idVendor) {
|
||||
case USB_VENDOR_ID_REALTEK:
|
||||
switch(id->idProduct) {
|
||||
case 0x0179:
|
||||
case 0x1724:
|
||||
case 0x8176:
|
||||
case 0x8178:
|
||||
@@ -7756,10 +7745,8 @@ static int rtl8xxxu_probe(struct usb_interface *interface,
|
||||
}
|
||||
|
||||
hw = ieee80211_alloc_hw(sizeof(struct rtl8xxxu_priv), &rtl8xxxu_ops);
|
||||
if (!hw) {
|
||||
ret = -ENOMEM;
|
||||
goto err_put_dev;
|
||||
}
|
||||
if (!hw)
|
||||
return -ENOMEM;
|
||||
|
||||
priv = hw->priv;
|
||||
priv->hw = hw;
|
||||
@@ -7901,8 +7888,6 @@ err_set_intfdata:
|
||||
mutex_destroy(&priv->h2c_mutex);
|
||||
|
||||
ieee80211_free_hw(hw);
|
||||
err_put_dev:
|
||||
usb_put_dev(udev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -7935,7 +7920,6 @@ static void rtl8xxxu_disconnect(struct usb_interface *interface)
|
||||
"Device still attached, trying to reset\n");
|
||||
usb_reset_device(priv->udev);
|
||||
}
|
||||
usb_put_dev(priv->udev);
|
||||
ieee80211_free_hw(hw);
|
||||
}
|
||||
|
||||
|
||||
@@ -1674,6 +1674,7 @@ static void rtl_pci_deinit(struct ieee80211_hw *hw)
|
||||
|
||||
synchronize_irq(rtlpci->pdev->irq);
|
||||
tasklet_kill(&rtlpriv->works.irq_tasklet);
|
||||
tasklet_kill(&rtlpriv->works.irq_prepare_bcn_tasklet);
|
||||
cancel_work_sync(&rtlpriv->works.lps_change_work);
|
||||
}
|
||||
|
||||
|
||||
@@ -212,9 +212,9 @@ void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
u8 boxcontent[4], boxextcontent[2];
|
||||
u16 box_reg = 0, box_extreg = 0;
|
||||
u8 wait_writeh2c_limmit = 100;
|
||||
u8 wait_writeh2c_limit = 100;
|
||||
bool bwrite_success = false;
|
||||
u8 wait_h2c_limmit = 100;
|
||||
u8 wait_h2c_limit = 100;
|
||||
u32 h2c_waitcounter = 0;
|
||||
bool isfw_read = false;
|
||||
unsigned long flag;
|
||||
@@ -261,8 +261,8 @@ void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
while (!bwrite_success) {
|
||||
wait_writeh2c_limmit--;
|
||||
if (wait_writeh2c_limmit == 0) {
|
||||
wait_writeh2c_limit--;
|
||||
if (wait_writeh2c_limit == 0) {
|
||||
pr_err("Write H2C fail because no trigger for FW INT!\n");
|
||||
break;
|
||||
}
|
||||
@@ -278,8 +278,8 @@ void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw,
|
||||
|
||||
isfw_read = _rtl92d_check_fw_read_last_h2c(hw, boxnum);
|
||||
while (!isfw_read) {
|
||||
wait_h2c_limmit--;
|
||||
if (wait_h2c_limmit == 0) {
|
||||
wait_h2c_limit--;
|
||||
if (wait_h2c_limit == 0) {
|
||||
rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
|
||||
"Waiting too long for FW read clear HMEBox(%d)!\n",
|
||||
boxnum);
|
||||
|
||||
@@ -986,7 +986,6 @@ int rtl_usb_probe(struct usb_interface *intf,
|
||||
init_completion(&rtlpriv->firmware_loading_complete);
|
||||
SET_IEEE80211_DEV(hw, &intf->dev);
|
||||
udev = interface_to_usbdev(intf);
|
||||
usb_get_dev(udev);
|
||||
usb_priv = rtl_usbpriv(hw);
|
||||
memset(usb_priv, 0, sizeof(*usb_priv));
|
||||
usb_priv->dev.intf = intf;
|
||||
@@ -1038,7 +1037,6 @@ error_out:
|
||||
rtl_deinit_core(hw);
|
||||
error_out2:
|
||||
_rtl_usb_io_handler_release(hw);
|
||||
usb_put_dev(udev);
|
||||
kfree(rtlpriv->usb_data);
|
||||
ieee80211_free_hw(hw);
|
||||
return -ENODEV;
|
||||
@@ -1050,7 +1048,6 @@ void rtl_usb_disconnect(struct usb_interface *intf)
|
||||
struct ieee80211_hw *hw = usb_get_intfdata(intf);
|
||||
struct rtl_priv *rtlpriv = rtl_priv(hw);
|
||||
struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
|
||||
struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
|
||||
|
||||
if (unlikely(!rtlpriv))
|
||||
return;
|
||||
@@ -1072,7 +1069,6 @@ void rtl_usb_disconnect(struct usb_interface *intf)
|
||||
kfree(rtlpriv->usb_data);
|
||||
rtlpriv->cfg->ops->deinit_sw_vars(hw);
|
||||
_rtl_usb_io_handler_release(hw);
|
||||
usb_put_dev(rtlusb->udev);
|
||||
usb_set_intfdata(intf, NULL);
|
||||
ieee80211_free_hw(hw);
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user