clk: renesas: rzv2h: Support static dividers without RMW

Add support for static dividers that do not require read-modify-write
(RMW) operations.  This enables the use of the generic clk_divider_ops
instead of the custom RMW-based implementation.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Co-developed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250407165202.197570-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
2025-04-07 17:51:56 +01:00
committed by Geert Uytterhoeven
parent 6e1c795071
commit 52239ebe62
2 changed files with 16 additions and 1 deletions

View File

@@ -374,7 +374,10 @@ rzv2h_cpg_ddiv_clk_register(const struct cpg_core_clk *core,
return ERR_PTR(-ENOMEM);
init.name = core->name;
init.ops = &rzv2h_ddiv_clk_divider_ops;
if (cfg_ddiv.no_rmw)
init.ops = &clk_divider_ops;
else
init.ops = &rzv2h_ddiv_clk_divider_ops;
init.parent_names = &parent_name;
init.num_parents = 1;

View File

@@ -37,12 +37,15 @@ struct pll {
* @shift: position of the divider bit
* @width: width of the divider
* @monbit: monitor bit in CPG_CLKSTATUS0 register
* @no_rmw: flag to indicate if the register is read-modify-write
* (1: no RMW, 0: RMW)
*/
struct ddiv {
unsigned int offset:11;
unsigned int shift:4;
unsigned int width:4;
unsigned int monbit:5;
unsigned int no_rmw:1;
};
/*
@@ -61,6 +64,15 @@ struct ddiv {
.monbit = _monbit \
})
#define DDIV_PACK_NO_RMW(_offset, _shift, _width, _monbit) \
((struct ddiv){ \
.offset = (_offset), \
.shift = (_shift), \
.width = (_width), \
.monbit = (_monbit), \
.no_rmw = 1 \
})
/**
* struct smuxed - Structure for static muxed clocks
*