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clk: renesas: rzv2h: Support static dividers without RMW
Add support for static dividers that do not require read-modify-write (RMW) operations. This enables the use of the generic clk_divider_ops instead of the custom RMW-based implementation. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Co-developed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407165202.197570-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
committed by
Geert Uytterhoeven
parent
6e1c795071
commit
52239ebe62
@@ -374,7 +374,10 @@ rzv2h_cpg_ddiv_clk_register(const struct cpg_core_clk *core,
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return ERR_PTR(-ENOMEM);
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init.name = core->name;
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init.ops = &rzv2h_ddiv_clk_divider_ops;
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if (cfg_ddiv.no_rmw)
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init.ops = &clk_divider_ops;
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else
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init.ops = &rzv2h_ddiv_clk_divider_ops;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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@@ -37,12 +37,15 @@ struct pll {
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* @shift: position of the divider bit
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* @width: width of the divider
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* @monbit: monitor bit in CPG_CLKSTATUS0 register
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* @no_rmw: flag to indicate if the register is read-modify-write
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* (1: no RMW, 0: RMW)
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*/
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struct ddiv {
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unsigned int offset:11;
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unsigned int shift:4;
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unsigned int width:4;
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unsigned int monbit:5;
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unsigned int no_rmw:1;
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};
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/*
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@@ -61,6 +64,15 @@ struct ddiv {
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.monbit = _monbit \
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})
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#define DDIV_PACK_NO_RMW(_offset, _shift, _width, _monbit) \
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((struct ddiv){ \
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.offset = (_offset), \
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.shift = (_shift), \
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.width = (_width), \
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.monbit = (_monbit), \
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.no_rmw = 1 \
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})
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/**
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* struct smuxed - Structure for static muxed clocks
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*
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