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synced 2026-05-05 23:05:25 -04:00
Merge existing fixes from spi/for-6.17 into new branch
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@@ -330,13 +330,11 @@ static int fsl_lpspi_set_bitrate(struct fsl_lpspi_data *fsl_lpspi)
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}
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if (config.speed_hz > perclk_rate / 2) {
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dev_err(fsl_lpspi->dev,
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"per-clk should be at least two times of transfer speed");
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return -EINVAL;
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div = 2;
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} else {
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div = DIV_ROUND_UP(perclk_rate, config.speed_hz);
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}
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div = DIV_ROUND_UP(perclk_rate, config.speed_hz);
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for (prescale = 0; prescale <= prescale_max; prescale++) {
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scldiv = div / (1 << prescale) - 2;
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if (scldiv >= 0 && scldiv < 256) {
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@@ -265,6 +265,9 @@ static bool spi_mem_internal_supports_op(struct spi_mem *mem,
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*/
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bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
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{
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/* Make sure the operation frequency is correct before going futher */
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spi_mem_adjust_op_freq(mem, (struct spi_mem_op *)op);
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if (spi_mem_check_op(op))
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return false;
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@@ -577,6 +580,7 @@ EXPORT_SYMBOL_GPL(spi_mem_adjust_op_freq);
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* spi_mem_calc_op_duration() - Derives the theoretical length (in ns) of an
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* operation. This helps finding the best variant
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* among a list of possible choices.
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* @mem: the SPI memory
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* @op: the operation to benchmark
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*
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* Some chips have per-op frequency limitations, PCBs usually have their own
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@@ -210,13 +210,21 @@ static int qcom_spi_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct qcom_nand_controller *snandc = nand_to_qcom_snand(nand);
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struct qpic_ecc *qecc = snandc->qspi->ecc;
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if (section > 1)
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return -ERANGE;
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switch (section) {
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case 0:
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oobregion->offset = 0;
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oobregion->length = qecc->bytes * (qecc->steps - 1) +
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qecc->bbm_size;
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return 0;
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case 1:
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oobregion->offset = qecc->bytes * (qecc->steps - 1) +
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qecc->bbm_size +
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qecc->steps * 4;
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oobregion->length = mtd->oobsize - oobregion->offset;
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return 0;
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}
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oobregion->length = qecc->ecc_bytes_hw + qecc->spare_bytes;
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oobregion->offset = mtd->oobsize - oobregion->length;
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return 0;
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return -ERANGE;
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}
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static int qcom_spi_ooblayout_free(struct mtd_info *mtd, int section,
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@@ -1196,7 +1204,7 @@ static int qcom_spi_program_oob(struct qcom_nand_controller *snandc,
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u32 cfg0, cfg1, ecc_bch_cfg, ecc_buf_cfg;
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cfg0 = (ecc_cfg->cfg0 & ~CW_PER_PAGE_MASK) |
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FIELD_PREP(CW_PER_PAGE_MASK, num_cw - 1);
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FIELD_PREP(CW_PER_PAGE_MASK, 0);
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cfg1 = ecc_cfg->cfg1;
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ecc_bch_cfg = ecc_cfg->ecc_bch_cfg;
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ecc_buf_cfg = ecc_cfg->ecc_buf_cfg;
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