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cxl/core/region: move pmem region driver logic into region_pmem.c
core/region.c is overloaded with per-region control logic (pmem, dax, sysram, etc). Move the pmem region driver logic from region.c into region_pmem.c make it clear that this code only applies to pmem regions. No functional changes. [ dj: Fixed up some tabbing issues, may be from original code. ] Signed-off-by: Gregory Price <gourry@gourry.net> Co-developed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20260327020203.876122-2-gourry@gourry.net Signed-off-by: Dave Jiang <dave.jiang@intel.com>
This commit is contained in:
Gregory Price
committed by
Dave Jiang
Dave Jiang
parent
f338e77383
commit
8a1ec5fb23
@@ -15,7 +15,7 @@ cxl_core-y += hdm.o
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cxl_core-y += pmu.o
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cxl_core-y += cdat.o
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cxl_core-$(CONFIG_TRACING) += trace.o
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cxl_core-$(CONFIG_CXL_REGION) += region.o
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cxl_core-$(CONFIG_CXL_REGION) += region.o region_pmem.o
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cxl_core-$(CONFIG_CXL_MCE) += mce.o
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cxl_core-$(CONFIG_CXL_FEATURES) += features.o
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cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += edac.o
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@@ -50,6 +50,7 @@ int cxl_get_poison_by_endpoint(struct cxl_port *port);
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struct cxl_region *cxl_dpa_to_region(const struct cxl_memdev *cxlmd, u64 dpa);
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u64 cxl_dpa_to_hpa(struct cxl_region *cxlr, const struct cxl_memdev *cxlmd,
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u64 dpa);
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int devm_cxl_add_pmem_region(struct cxl_region *cxlr);
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#else
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static inline u64 cxl_dpa_to_hpa(struct cxl_region *cxlr,
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@@ -2757,46 +2757,6 @@ static ssize_t delete_region_store(struct device *dev,
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}
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DEVICE_ATTR_WO(delete_region);
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static void cxl_pmem_region_release(struct device *dev)
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{
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struct cxl_pmem_region *cxlr_pmem = to_cxl_pmem_region(dev);
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int i;
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for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
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struct cxl_memdev *cxlmd = cxlr_pmem->mapping[i].cxlmd;
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put_device(&cxlmd->dev);
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}
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kfree(cxlr_pmem);
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}
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static const struct attribute_group *cxl_pmem_region_attribute_groups[] = {
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&cxl_base_attribute_group,
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NULL,
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};
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const struct device_type cxl_pmem_region_type = {
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.name = "cxl_pmem_region",
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.release = cxl_pmem_region_release,
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.groups = cxl_pmem_region_attribute_groups,
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};
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bool is_cxl_pmem_region(struct device *dev)
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{
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return dev->type == &cxl_pmem_region_type;
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}
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EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, "CXL");
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struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
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{
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if (dev_WARN_ONCE(dev, !is_cxl_pmem_region(dev),
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"not a cxl_pmem_region device\n"))
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return NULL;
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return container_of(dev, struct cxl_pmem_region, dev);
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}
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EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, "CXL");
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struct cxl_poison_context {
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struct cxl_port *port;
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int part;
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@@ -3450,64 +3410,6 @@ static int region_offset_to_dpa_result(struct cxl_region *cxlr, u64 offset,
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return -ENXIO;
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}
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static struct lock_class_key cxl_pmem_region_key;
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static int cxl_pmem_region_alloc(struct cxl_region *cxlr)
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{
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struct cxl_region_params *p = &cxlr->params;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct device *dev;
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int i;
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guard(rwsem_read)(&cxl_rwsem.region);
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if (p->state != CXL_CONFIG_COMMIT)
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return -ENXIO;
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struct cxl_pmem_region *cxlr_pmem __free(kfree) =
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kzalloc_flex(*cxlr_pmem, mapping, p->nr_targets);
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if (!cxlr_pmem)
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return -ENOMEM;
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cxlr_pmem->hpa_range.start = p->res->start;
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cxlr_pmem->hpa_range.end = p->res->end;
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/* Snapshot the region configuration underneath the cxl_rwsem.region */
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cxlr_pmem->nr_mappings = p->nr_targets;
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for (i = 0; i < p->nr_targets; i++) {
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struct cxl_endpoint_decoder *cxled = p->targets[i];
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struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
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struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
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/*
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* Regions never span CXL root devices, so by definition the
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* bridge for one device is the same for all.
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*/
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if (i == 0) {
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cxl_nvb = cxl_find_nvdimm_bridge(cxlmd->endpoint);
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if (!cxl_nvb)
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return -ENODEV;
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cxlr->cxl_nvb = cxl_nvb;
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}
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m->cxlmd = cxlmd;
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get_device(&cxlmd->dev);
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m->start = cxled->dpa_res->start;
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m->size = resource_size(cxled->dpa_res);
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m->position = i;
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}
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dev = &cxlr_pmem->dev;
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device_initialize(dev);
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lockdep_set_class(&dev->mutex, &cxl_pmem_region_key);
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device_set_pm_not_required(dev);
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dev->parent = &cxlr->dev;
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dev->bus = &cxl_bus_type;
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dev->type = &cxl_pmem_region_type;
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cxlr_pmem->cxlr = cxlr;
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cxlr->cxlr_pmem = no_free_ptr(cxlr_pmem);
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return 0;
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}
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static void cxl_dax_region_release(struct device *dev)
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{
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struct cxl_dax_region *cxlr_dax = to_cxl_dax_region(dev);
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@@ -3571,92 +3473,6 @@ static struct cxl_dax_region *cxl_dax_region_alloc(struct cxl_region *cxlr)
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return cxlr_dax;
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}
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static void cxlr_pmem_unregister(void *_cxlr_pmem)
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{
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struct cxl_pmem_region *cxlr_pmem = _cxlr_pmem;
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struct cxl_region *cxlr = cxlr_pmem->cxlr;
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struct cxl_nvdimm_bridge *cxl_nvb = cxlr->cxl_nvb;
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/*
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* Either the bridge is in ->remove() context under the device_lock(),
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* or cxlr_release_nvdimm() is cancelling the bridge's release action
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* for @cxlr_pmem and doing it itself (while manually holding the bridge
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* lock).
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*/
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device_lock_assert(&cxl_nvb->dev);
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cxlr->cxlr_pmem = NULL;
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cxlr_pmem->cxlr = NULL;
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device_unregister(&cxlr_pmem->dev);
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}
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static void cxlr_release_nvdimm(void *_cxlr)
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{
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struct cxl_region *cxlr = _cxlr;
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struct cxl_nvdimm_bridge *cxl_nvb = cxlr->cxl_nvb;
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scoped_guard(device, &cxl_nvb->dev) {
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if (cxlr->cxlr_pmem)
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devm_release_action(&cxl_nvb->dev, cxlr_pmem_unregister,
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cxlr->cxlr_pmem);
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}
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cxlr->cxl_nvb = NULL;
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put_device(&cxl_nvb->dev);
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}
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/**
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* devm_cxl_add_pmem_region() - add a cxl_region-to-nd_region bridge
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* @cxlr: parent CXL region for this pmem region bridge device
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*
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* Return: 0 on success negative error code on failure.
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*/
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static int devm_cxl_add_pmem_region(struct cxl_region *cxlr)
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{
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struct cxl_pmem_region *cxlr_pmem;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct device *dev;
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int rc;
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rc = cxl_pmem_region_alloc(cxlr);
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if (rc)
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return rc;
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cxlr_pmem = cxlr->cxlr_pmem;
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cxl_nvb = cxlr->cxl_nvb;
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dev = &cxlr_pmem->dev;
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rc = dev_set_name(dev, "pmem_region%d", cxlr->id);
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if (rc)
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goto err;
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rc = device_add(dev);
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if (rc)
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goto err;
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dev_dbg(&cxlr->dev, "%s: register %s\n", dev_name(dev->parent),
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dev_name(dev));
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scoped_guard(device, &cxl_nvb->dev) {
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if (cxl_nvb->dev.driver)
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rc = devm_add_action_or_reset(&cxl_nvb->dev,
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cxlr_pmem_unregister,
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cxlr_pmem);
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else
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rc = -ENXIO;
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}
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if (rc)
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goto err_bridge;
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/* @cxlr carries a reference on @cxl_nvb until cxlr_release_nvdimm */
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return devm_add_action_or_reset(&cxlr->dev, cxlr_release_nvdimm, cxlr);
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err:
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put_device(dev);
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err_bridge:
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put_device(&cxl_nvb->dev);
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cxlr->cxl_nvb = NULL;
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return rc;
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}
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static void cxlr_dax_unregister(void *_cxlr_dax)
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{
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struct cxl_dax_region *cxlr_dax = _cxlr_dax;
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191
drivers/cxl/core/region_pmem.c
Normal file
191
drivers/cxl/core/region_pmem.c
Normal file
@@ -0,0 +1,191 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2022 Intel Corporation. All rights reserved. */
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <cxlmem.h>
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#include <cxl.h>
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#include "core.h"
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static void cxl_pmem_region_release(struct device *dev)
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{
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struct cxl_pmem_region *cxlr_pmem = to_cxl_pmem_region(dev);
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int i;
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for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
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struct cxl_memdev *cxlmd = cxlr_pmem->mapping[i].cxlmd;
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put_device(&cxlmd->dev);
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}
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kfree(cxlr_pmem);
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}
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static const struct attribute_group *cxl_pmem_region_attribute_groups[] = {
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&cxl_base_attribute_group,
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NULL
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};
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const struct device_type cxl_pmem_region_type = {
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.name = "cxl_pmem_region",
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.release = cxl_pmem_region_release,
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.groups = cxl_pmem_region_attribute_groups,
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};
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bool is_cxl_pmem_region(struct device *dev)
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{
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return dev->type == &cxl_pmem_region_type;
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}
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EXPORT_SYMBOL_NS_GPL(is_cxl_pmem_region, "CXL");
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struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
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{
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if (dev_WARN_ONCE(dev, !is_cxl_pmem_region(dev),
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"not a cxl_pmem_region device\n"))
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return NULL;
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return container_of(dev, struct cxl_pmem_region, dev);
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}
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EXPORT_SYMBOL_NS_GPL(to_cxl_pmem_region, "CXL");
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static struct lock_class_key cxl_pmem_region_key;
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static int cxl_pmem_region_alloc(struct cxl_region *cxlr)
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{
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struct cxl_region_params *p = &cxlr->params;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct device *dev;
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int i;
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guard(rwsem_read)(&cxl_rwsem.region);
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if (p->state != CXL_CONFIG_COMMIT)
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return -ENXIO;
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struct cxl_pmem_region *cxlr_pmem __free(kfree) =
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kzalloc_flex(*cxlr_pmem, mapping, p->nr_targets);
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if (!cxlr_pmem)
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return -ENOMEM;
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cxlr_pmem->hpa_range.start = p->res->start;
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cxlr_pmem->hpa_range.end = p->res->end;
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/* Snapshot the region configuration underneath the cxl_rwsem.region */
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cxlr_pmem->nr_mappings = p->nr_targets;
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for (i = 0; i < p->nr_targets; i++) {
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struct cxl_endpoint_decoder *cxled = p->targets[i];
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struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
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struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
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/*
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* Regions never span CXL root devices, so by definition the
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* bridge for one device is the same for all.
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*/
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if (i == 0) {
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cxl_nvb = cxl_find_nvdimm_bridge(cxlmd->endpoint);
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if (!cxl_nvb)
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return -ENODEV;
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cxlr->cxl_nvb = cxl_nvb;
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}
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m->cxlmd = cxlmd;
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get_device(&cxlmd->dev);
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m->start = cxled->dpa_res->start;
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m->size = resource_size(cxled->dpa_res);
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m->position = i;
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}
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dev = &cxlr_pmem->dev;
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device_initialize(dev);
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lockdep_set_class(&dev->mutex, &cxl_pmem_region_key);
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device_set_pm_not_required(dev);
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dev->parent = &cxlr->dev;
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dev->bus = &cxl_bus_type;
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dev->type = &cxl_pmem_region_type;
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cxlr_pmem->cxlr = cxlr;
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cxlr->cxlr_pmem = no_free_ptr(cxlr_pmem);
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return 0;
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}
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static void cxlr_pmem_unregister(void *_cxlr_pmem)
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{
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struct cxl_pmem_region *cxlr_pmem = _cxlr_pmem;
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struct cxl_region *cxlr = cxlr_pmem->cxlr;
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struct cxl_nvdimm_bridge *cxl_nvb = cxlr->cxl_nvb;
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/*
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* Either the bridge is in ->remove() context under the device_lock(),
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* or cxlr_release_nvdimm() is cancelling the bridge's release action
|
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* for @cxlr_pmem and doing it itself (while manually holding the bridge
|
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* lock).
|
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*/
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device_lock_assert(&cxl_nvb->dev);
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cxlr->cxlr_pmem = NULL;
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cxlr_pmem->cxlr = NULL;
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device_unregister(&cxlr_pmem->dev);
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}
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static void cxlr_release_nvdimm(void *_cxlr)
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{
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struct cxl_region *cxlr = _cxlr;
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struct cxl_nvdimm_bridge *cxl_nvb = cxlr->cxl_nvb;
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scoped_guard(device, &cxl_nvb->dev) {
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if (cxlr->cxlr_pmem)
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devm_release_action(&cxl_nvb->dev, cxlr_pmem_unregister,
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cxlr->cxlr_pmem);
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}
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cxlr->cxl_nvb = NULL;
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put_device(&cxl_nvb->dev);
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}
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/**
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* devm_cxl_add_pmem_region() - add a cxl_region-to-nd_region bridge
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* @cxlr: parent CXL region for this pmem region bridge device
|
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*
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* Return: 0 on success negative error code on failure.
|
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*/
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int devm_cxl_add_pmem_region(struct cxl_region *cxlr)
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{
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struct cxl_pmem_region *cxlr_pmem;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct device *dev;
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int rc;
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rc = cxl_pmem_region_alloc(cxlr);
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if (rc)
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return rc;
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cxlr_pmem = cxlr->cxlr_pmem;
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cxl_nvb = cxlr->cxl_nvb;
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dev = &cxlr_pmem->dev;
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rc = dev_set_name(dev, "pmem_region%d", cxlr->id);
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if (rc)
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goto err;
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rc = device_add(dev);
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if (rc)
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goto err;
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dev_dbg(&cxlr->dev, "%s: register %s\n", dev_name(dev->parent),
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dev_name(dev));
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scoped_guard(device, &cxl_nvb->dev) {
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if (cxl_nvb->dev.driver)
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rc = devm_add_action_or_reset(&cxl_nvb->dev,
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cxlr_pmem_unregister,
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cxlr_pmem);
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else
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rc = -ENXIO;
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}
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if (rc)
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goto err_bridge;
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/* @cxlr carries a reference on @cxl_nvb until cxlr_release_nvdimm */
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return devm_add_action_or_reset(&cxlr->dev, cxlr_release_nvdimm, cxlr);
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err:
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put_device(dev);
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err_bridge:
|
||||
put_device(&cxl_nvb->dev);
|
||||
cxlr->cxl_nvb = NULL;
|
||||
return rc;
|
||||
}
|
||||
@@ -59,7 +59,7 @@ cxl_core-y += $(CXL_CORE_SRC)/hdm.o
|
||||
cxl_core-y += $(CXL_CORE_SRC)/pmu.o
|
||||
cxl_core-y += $(CXL_CORE_SRC)/cdat.o
|
||||
cxl_core-$(CONFIG_TRACING) += $(CXL_CORE_SRC)/trace.o
|
||||
cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o
|
||||
cxl_core-$(CONFIG_CXL_REGION) += $(CXL_CORE_SRC)/region.o $(CXL_CORE_SRC)/region_pmem.o
|
||||
cxl_core-$(CONFIG_CXL_MCE) += $(CXL_CORE_SRC)/mce.o
|
||||
cxl_core-$(CONFIG_CXL_FEATURES) += $(CXL_CORE_SRC)/features.o
|
||||
cxl_core-$(CONFIG_CXL_EDAC_MEM_FEATURES) += $(CXL_CORE_SRC)/edac.o
|
||||
|
||||
Reference in New Issue
Block a user