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dt-bindings: interrupt-controller: Convert marvell,ap806-gicp to DT schema
Convert the Marvell GICP MSI controller binding to schema format. It's a straight-forward conversion of the typical MSI controller. Link: https://lore.kernel.org/r/20250505144721.1290068-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-gicp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Marvell GICP Controller
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maintainers:
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- Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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description:
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GICP is a Marvell extension of the GIC that allows to trigger GIC SPI
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interrupts by doing a memory transaction. It is used by the ICU
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located in the Marvell CP110 to turn wired interrupts inside the CP
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into GIC SPI interrupts.
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properties:
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compatible:
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const: marvell,ap806-gicp
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reg:
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maxItems: 1
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marvell,spi-ranges:
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description: Tuples of GIC SPI interrupt ranges available for this GICP
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: SPI interrupt base
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- description: Number of interrupts in the range
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msi-controller: true
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required:
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- compatible
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- reg
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- msi-controller
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- marvell,spi-ranges
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additionalProperties: false
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examples:
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- |
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msi-controller@3f0040 {
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compatible = "marvell,ap806-gicp";
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reg = <0x3f0040 0x10>;
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marvell,spi-ranges = <64 64>, <288 64>;
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msi-controller;
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};
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Marvell GICP Controller
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-----------------------
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GICP is a Marvell extension of the GIC that allows to trigger GIC SPI
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interrupts by doing a memory transaction. It is used by the ICU
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located in the Marvell CP110 to turn wired interrupts inside the CP
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into GIC SPI interrupts.
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Required properties:
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- compatible: Must be "marvell,ap806-gicp"
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- reg: Must be the address and size of the GICP SPI registers
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- marvell,spi-ranges: tuples of GIC SPI interrupts ranges available
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for this GICP
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- msi-controller: indicates that this is an MSI controller
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Example:
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gicp_spi: gicp-spi@3f0040 {
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compatible = "marvell,ap806-gicp";
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reg = <0x3f0040 0x10>;
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marvell,spi-ranges = <64 64>, <288 64>;
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msi-controller;
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};
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