Commit Graph

54281 Commits

Author SHA1 Message Date
Philipp Zabel
d0cbc93a01 gpu: ipu-v3: ipu-ic: allow to manually set resize coefficients
For tiled scaling, we want to compute the scaling coefficients
externally in such a way that the interpolation overshoots tile
boundaries and samples up to the first pixel of the next tile.
Prepare to override the resizing coefficients from the image
conversion code.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Steve Longerbeam <slongerbeam@gmail.com>
Tested-by: Steve Longerbeam <slongerbeam@gmail.com>
2018-11-05 14:40:06 +01:00
Steve Longerbeam
dec408fd23 gpu: ipu-v3: Add chroma plane offset overrides to ipu_cpmem_set_image()
Allow the caller of ipu_cpmem_set_image() to override the latters
calculation of the chroma plane offsets, by adding override U/V
plane offsets to 'struct ipu_image'.

Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05 14:40:06 +01:00
Steve Longerbeam
22ec080819 gpu: ipu-cpmem: add WARN_ON_ONCE() for unaligned dma buffers
Add a WARN_ON_ONCE() if either the Y/packed buffer, or the U/V offsets,
are not aligned on 8-byte boundaries. This will catch alignment
bugs in DRM, V4L2.

Signed-off-by: Steve Longerbeam <slongerbeam@gmail.com>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05 14:40:06 +01:00
Julia Lawall
fac8033fe3 drm/imx: imx-tve: constify clk_ops structure
The clk_ops structure is only stored in the ops field of a
clk_init_data structure.  This field is const, so the clk_ops
structure can be const as well.

Identified and transformed using Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05 14:40:06 +01:00
Fabio Estevam
946485d0ed drm/imx: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2018-11-05 14:40:06 +01:00
Emil Velikov
3a6eb79564 drm/vgem: create a render node for vgem
VGEM doesn't do anything modeset specific, so in a way exposing a
primary node is 'wrong'. At the same time, we extensively use if for
creating dumb buffers, fences, prime fd <> handle imports/exports.

To the point that we explicitly annotate the vgem fence ioctls as
DRM_RENDER_ALLOW and have an IGT test which opens the render node.

close(drm_open_driver_render(DRIVER_VGEM))

Better late than never, let's flip the switch.

Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20181026120647.7528-1-emil.l.velikov@gmail.com
2018-11-05 13:06:30 +00:00
Icenowy Zheng
9b4dcc9cbb drm: sun4i: add support for H6 TCON TOP
The TCON TOP on Allwinner H6 SoC is a cut down version of the R40 TCON
TOP, which dropped TCON_TV1 and DSI (which do not exist on H6).

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-27-jernej.skrabec@siol.net
2018-11-05 11:49:06 +01:00
Icenowy Zheng
10ead694f0 drm: sun4i: add quirks for TCON TOP
Some SoCs, such as H6, doesn't have a full-featured TCON TOP.

Add quirks support for TCON TOP.

Currently the presence of TCON_TV1 and DSI is controlled via the quirks
structure.

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Fixed code style and removed unnecessary initialization]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-25-jernej.skrabec@siol.net
2018-11-05 11:49:06 +01:00
Jernej Skrabec
c96d62215f drm/sun4i: Initialize registers in tcon-top driver
It turns out that TCON TOP registers in H6 SoC have non-zero reset
value. This may cause issues if bits are not changed during
configuration.

To prevent that, initialize registers to 0.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-24-jernej.skrabec@siol.net
2018-11-05 11:49:05 +01:00
Jernej Skrabec
0fb4b858b1 drm/sun4i: Add support for H6 HDMI PHY
H6 has Synopsys DWC HDMI 2.0 TX PHY.

There is no freely available documentation for it, only code found in
BSP kernel. However, judging by the code, PHY is very similar to older
Synopsys HDMI PHY described in i.MX6 documentation. Most registers seem
to be the same.

According to i.MX6 documentation, mpll settings are based on pixel clock
and are not specific to each SoC. Because of that, mpll table in this
commit is based on that documentation and not on BSP code. Other PHY
settings were derived from BSP PHY driver code.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-23-jernej.skrabec@siol.net
2018-11-05 11:49:05 +01:00
Jernej Skrabec
c71c9b2fee drm/sun4i: Add support for Synopsys HDMI PHY
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to
DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys
PHY, driver has to be reorganized to support them.

Variant structure is expanded to allow differentiation between custom
and Sysnopsys PHYs and to hold Synopsys PHY settings.

Since DW HDMI bridge platform data has different fields for custom and
Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with
sun8i_hdmi_phy_set_ops().

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-22-jernej.skrabec@siol.net
2018-11-05 11:49:05 +01:00
Jernej Skrabec
058262b1e5 drm/sun4i: dw-hdmi-phy: Reorder quirks by family
Currently, quirks and compatibles are sorted alphabetically. However,
they should be sorted by family release date and then alphabetically.

Fix that by moving A64 quirks and compatible to bottom. No functional
change is made.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-21-jernej.skrabec@siol.net
2018-11-05 11:49:04 +01:00
Jernej Skrabec
40bb9d3147 drm/sun4i: Add support for H6 DW HDMI controller
H6 has DW HDMI 2.0b controller v2.12a.

It supports 4K at 60 Hz and HDCP 2.2.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-20-jernej.skrabec@siol.net
2018-11-05 11:49:04 +01:00
Jernej Skrabec
76ce87ca50 drm/sun4i: dw-hdmi: Add quirk for setting TMDS clock
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at
all. At this point it is not clear whether it is just not necessary or
it would cause some kind of issues.

Add a quirk for it.

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-18-jernej.skrabec@siol.net
2018-11-05 11:49:04 +01:00
Jernej Skrabec
799715212b drm/sun4i: dw-hdmi: Make mode_valid function configurable
Since it is not possible to access sun8i-dw-hdmi driver private data
inside mode_valid function, make it configurable. That way different
versions of HDMI controllers can set different function, depending on
it's limitations.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-17-jernej.skrabec@siol.net
2018-11-05 11:49:03 +01:00
Jernej Skrabec
cd54074e82 drm/sun4i: Not all DW HDMI controllers has scrambled addresses
Currently supported Allwinner SoCs with DW HDMI controller have
scrambled addresses and read lock. However, that is not true in general.
For example, A80 and H6 have normal addresses and normal read access.

Move code for unscrambling addresses and unlocking read access to it's
own function and call it from init function.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-16-jernej.skrabec@siol.net
2018-11-05 11:49:03 +01:00
Jernej Skrabec
c8c78ac261 drm/bridge/synopsys: dw-hdmi: Enable workaround for v2.12a
It turns out that even new DW HDMI controllers exhibits same magenta
line issues as older versions.

Enable workaround for v2.12a.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-15-jernej.skrabec@siol.net
2018-11-05 11:49:03 +01:00
Jernej Skrabec
0a14b64162 drm/sun4i: Add support for H6 DE3 mixer 0
Mixer 0 has 1 VI and 3 UI planes, scaler on all planes and can output
4K image @60Hz. It also support 10 bit colors, which are not yet
implemented.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-14-jernej.skrabec@siol.net
2018-11-05 11:49:03 +01:00
Jernej Skrabec
c50519e6db drm/sun4i: Add basic support for DE3
Display Engine 3 is an upgrade of DE2 with new features like support for
10 bit color formats and support for AFBC.

Most of DE2 code works with DE3, except some small details.

Implement basic support for DE3. Support for 10 bit colort formats and
AFBC, among others missing features, will be added later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/260238/
2018-11-05 11:48:23 +01:00
Jernej Skrabec
97eb57feda drm/sun4i: Disable unused DE2 sub-engines
Some sub-engines are unused. Disable them explicitly.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-12-jernej.skrabec@siol.net
2018-11-05 10:35:27 +01:00
Jernej Skrabec
218d6a3cfc drm/sun4i: Fix DE2 mixer size
DE2 mixer is always 0x6000 bytes in size on all known SoCs.

While at it, introduce a macro for that.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-11-jernej.skrabec@siol.net
2018-11-05 10:34:49 +01:00
Jernej Skrabec
4b09c07383 drm/sun4i: Rework DE2 register defines
Most, if not all, registers found in DE2 still exists in DE3. However,
units are on different base addresses.

To prepare for addition of DE3 support, registers macros are reworked so
they take base address as parameter.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
[rebased]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-10-jernej.skrabec@siol.net
2018-11-05 10:34:43 +01:00
Andrzej Hajda
989534cfca drm/exynos/fbdev: do not skip fbdev init if there are no connectors
Since connectors can be created dynamically, fbdev should be initialized
even if there are no connectors at the moment. Otherwise fbdev will
not be created even after connector's appearance.
The patch fixes lack of fbdev on rinato and trats boards.

Fixes: 6afb7721e2 ("drm/exynos: move connector creation to attach callback")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05 16:37:24 +09:00
Andrzej Hajda
deee3284cb drm/exynos/dsi: register connector if it is created after drm bind
DSI device can be attached after DRM device is registered. In such
case newly created connector must be registered by exynos_dsi.
The patch fixes exynos_drm on rinato and trats boards.

Fixes: 6afb7721e2 ("drm/exynos: move connector creation to attach callback")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05 16:37:24 +09:00
Inki Dae
6ca469e22a Revert "drm/exynos/decon5433: implement frame counter"
This reverts commit 0586feba32

This patch makes it to need get_vblank_counter callback in crtc
to get frame counter from decon driver.

However, drm_dev->max_vblank_count is a member unique to
vendor's DRM driver but in case of ARM DRM, some CRTC devices
don't provide the frame counter value. As a result, this patch
made extension and clone mode not working.

Instead of this patch, we may need separated max_vblank_count
which belongs to each CRTC device, or need to implement frame
counter emulation for them who don't support HW frame counter.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05 16:37:24 +09:00
Dan Carpenter
8727b230f6 drm/exynos: checking for NULL instead of IS_ERR()
The of_drm_find_panel() function returns error pointers and never NULL
but we the driver assumes that ->panel is NULL when it's not present.

Fixes: 6afb7721e2 ("drm/exynos: move connector creation to attach callback")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2018-11-05 16:37:24 +09:00
Anusha Srivatsa
08cadae8e1 i915/dp/fec: Cache the FEC_CAPABLE DPCD register
Similar to DSC DPCD registers, let us cache
FEC_CAPABLE register to avoid using stale
values. With this we can avoid aux reads
everytime and instead read the cached values.

v2: Avoid using memset and array for a single
field. (Manasi,Jani)

v3: Print FEC CAPABILITY value. (Manasi)

Suggested-by: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102041455.15818-1-anusha.srivatsa@intel.com
2018-11-02 18:21:21 -07:00
Daniel Vetter
6caec6a047 drm/lease: drop EXPORT_SYMBOL
Leases are entirely implemented within drm.ko, no need to even tempt
drivers into doing nasty things. And if there's really a need, we can
always re-export these again.

Cc: Keith Packard <keithp@keithp.com>
Cc: Dave Airlie <airlied@gmail.com>
Acked-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102143107.25722-1-daniel.vetter@ffwll.ch
2018-11-02 21:57:47 +01:00
Chris Wilson
83b466b1dc drm/i915: Mark pin flags as u64
Since the flags are being used to operate on a u64 variable, they too
need to be marked as such so that the inverses are full width (and not
zero extended on 32b kernels and bdw+).

Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102161232.17742-2-chris@chris-wilson.co.uk
2018-11-02 20:28:26 +00:00
Linus Torvalds
bc6080ae38 Merge tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie:
 "Pretty much a normal fixes pull pre-rc1, mostly amdgpu fixes, one i915
  link training regression fix, and a couple of minor panel/bridge fixes
  and a panel quirk"

* tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm: (37 commits)
  drm/amdgpu: revert "enable gfxoff in non-sriov and stutter mode by default"
  drm/amd/pp: Print warning if od_sclk/mclk out of range
  drm/amd/pp: Fix pp_sclk/mclk_od not work on Vega10
  drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7
  drm/amd/powerplay: no MGPU fan boost enablement on DPM disabled
  drm/amdgpu: Fix skipping hangged job reset during gpu recover.
  drm/amd/powerplay: revise Vega20 pptable version check
  drm/amd/display: set backlight level limit to 1
  drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
  dt-bindings: drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
  drm/bridge: ti-sn65dsi86: Remove the mystery delay
  drm/panel: simple: Add "no-hpd" delay for Innolux TV123WAM
  drm/panel: simple: Support panels with HPD where HPD isn't connected
  dt-bindings: drm/panel: simple: Add no-hpd property
  drm/edid: Add 6 bpc quirk for BOE panel.
  drm/amdgpu: fix reporting of failed msg sent to SMU (v2)
  drm/amdgpu: Fix compute ring 1.0.0 failure after reset
  drm/amdgpu: fix VM leaf walking
  drm/amdgpu: fix amdgpu_vm_fini
  drm/amd/powerplay: commonize the API for retrieving current clocks
  ...
2018-11-02 10:58:20 -07:00
Anusha Srivatsa
a6576a8d71 drm/i915/fia: FIA registers offset implementation.
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.

v2:
- Follow spec for numbering - s/0/1(Lucas)
- s/FIA_1/FIA1_BASE (Anusha)

v3:
- Remove register offset defines. (Jani)
- Update comment. (Anusha)

v4: rebase. Remove comment.(Lucas)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101185557.29585-1-anusha.srivatsa@intel.com
2018-11-02 10:43:59 -07:00
Radhakrishna Sripada
f1a1217222 drm/i915: Allow "max bpc" property to limit pipe_bpp
Use the newly added "max bpc" connector property to limit pipe bpp.

V3: Use drm_connector_state to access the "max bpc" property
V4: Initialize the drm property, add suuport to DP(Ville)
V5: Use the property in the connector and fix CI failure(Ville)
V6: Use the core function to attach max_bpc property, remove the redundant
    clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
V9: Cleanup connected_sink_max_bpp and fix initial value in DP(Ville)
V12: Fix debug message(Ville)
V13: Remove the redundant check and simplify the check logic(Stan)
V14: Fix the check in connected_sink_max_bpp(Stan)
v15 (From Manasi): Add missing break (Stan)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Kishore Kadiyala <kishore.kadiyala@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023014400.16055-1-manasi.d.navare@intel.com
2018-11-02 09:16:03 -07:00
Radhakrishna Sripada
47e22ff1a9 drm: Add connector property to limit max bpc
At times 12bpc HDMI cannot be driven due to faulty cables, dongles
level shifters etc. To workaround them we may need to drive the output
at a lower bpc. Currently the user space does not have a way to limit
the bpc. The default bpc to be programmed is decided by the driver and
is run against connector limitations.

Creating a new connector property "max bpc" in order to limit the bpc.
xrandr can make use of this connector property to make sure that bpc does
not exceed the configured value. This property can be used by userspace to
set the bpc.

V2: Initialize max_bpc to satisfy kms_properties
V3: Move the property to drm_connector
V4: Split drm and i915 components(Ville)
V5: Make the property per connector(Ville)
V6: Compare the requested bpc to connector bpc(Daniel)
    Move the attach_property function to core(Ville)
V7: Fix checkpatch warnings
V8: Simplify the connector check code(Ville)
V9: Const display_info(Ville)
V10,V11: Fix CI issues.
V12: Add the Kernel documentation(Daniel)
V14: Crossreference the function name in the doc(Daniel)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Kishore Kadiyala <kishore.kadiyala@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: Sunpeng Li <sunpeng.li@amd.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181012184233.29250-1-radhakrishna.sripada@intel.com
2018-11-02 09:15:58 -07:00
Alexandru-Cosmin Gheorghe
9341c668c8 drm/selftests: Fix build warning -Wframe-larger-than
It seems for some random configuration drm_device is bigger than 2048
bytes.
The fix is to make the mock objects static variables.

Bug reported by 0-DAY Kernel test infrastructure here:
https://lists.01.org/pipermail/kbuild-all/2018-November/054431.html

Fixes: 6ff3d9ffdc ("drm/selftests: Add tests for drm_internal_framebuffer_create")
Signed-off-by: Alexandru-Cosmin Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181102130103.7753-1-alexandru-cosmin.gheorghe@arm.com
2018-11-02 14:25:32 +01:00
Jani Nikula
5468a54340 drm/i915: Update DRIVER_DATE to 20181102
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2018-11-02 12:04:11 +02:00
Alexandru Gheorghe
6ff3d9ffdc drm/selftests: Add tests for drm_internal_framebuffer_create
Add tests that verify that drm_internal_framebuffer_create creates
buffers correctly by creating a dummy drm_device with a mock function
for the fb_create callback.

To decide if a buffer has been created or not it just checks if
fb_create callback has been called for the particular drm_mode_fb_cmd2
that's being tested.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-8-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:58:30 +00:00
Alexandru Gheorghe
9aefed1f74 drm: Add macro to export functions only when CONFIG_DRM_DEBUG_SELFTEST is enabled
If we want to be able to write drmselftests for non-static core
functions that are not intended to be used by drivers we need this
functions to be exported.

This adds a macro that is tied of CONFIG_DRM_DEBUG_SELFTEST, and uses
that to export drm_internal_framebuffer_create, in order for
subsequent patches to be able to test it.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-7-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:58:10 +00:00
Alexandru Gheorghe
0d1c7d0fa9 drm/selftests: Add tests for drm_format_info* helpers
Add selftests for the following newly added functions:
 - drm_format_info_block_width
 - drm_format_info_block_height
 - drm_format_info_min_pitch

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-6-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:57:58 +00:00
Alexandru Gheorghe
8db2dc8529 drm: Extend framebuffer_check to handle formats with cpp/char_per_block 0
For formats that are supported only with non-linear modifiers it
doesn't make to much sense to define cpp or char_per_block, so that
will be set to 0.

This patch adds a restriction to force having a modifier attached when
cpp/char_per_block is 0, and to bypass checking the pitch restriction.

This had been discussed here.
[1] https://people.freedesktop.org/~cbrill/dri-log/?channel=dri-devel&highlight_names=&date=2018-09-13&show_html=true

Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-5-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:57:40 +00:00
Alexandru Gheorghe
55bc277d12 drm: mali-dp: Enable Mali-DP tiled buffer formats
Enable the following formats
- DRM_FORMAT_X0L0: DP650
- DRM_FORMAT_X0L2: DP550, DP650

Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-4-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:57:27 +00:00
Alexandru Gheorghe
697b6b8504 drm/fourcc: Add fourcc for Mali linear tiled formats
Mali-DP implements a number of tiled yuv formats which are not
currently described in drm_fourcc.h.
This adds those definitions and describes their memory layout by
using the newly added char_per_block, block_w, block_h.

Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101151051.1509-3-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:55:44 +00:00
Alexandru Gheorghe
042bf75384 drm/fourcc: Add char_per_block, block_w and block_h in drm_format_info
For some pixel formats .cpp structure in drm_format info it's not
enough to describe the peculiarities of the pixel layout, for example
tiled formats or packed formats at bit level.

What's implemented here is to add three new members to drm_format_info
that could describe such formats:

- char_per_block[3]
- block_w[3]
- block_h[3]

char_per_block will be put in a union alongside cpp, for transparent
compatibility  with the existing format descriptions.

Regarding, block_w and block_h they are intended to be used through
their equivalent getters drm_format_info_block_width /
drm_format_info_block_height, the reason of the getters is to abstract
the fact that for normal formats block_w and block_h will be unset/0,
but the methods will be returning 1.

Additionally, convenience function drm_format_info_min_pitch had been
added that computes the minimum required pitch for a given pixel
format and buffer width.

Using that the following drm core functions had been updated to
generically handle both block and non-block formats:

- drm_fb_cma_get_gem_addr: for block formats it will just return the
  beginning of the block.
- framebuffer_check: Use the newly added drm_format_info_min_pitch.
- drm_gem_fb_create_with_funcs: Use the newly added
  drm_format_info_min_pitch.
- In places where is not expecting to handle block formats, like fbdev
  helpers I just added some warnings in case the block width/height
  are greater than 1.

Changes since v3:
 - Add helper function for computing the minimum required pitch.
 - Improve/cleanup documentation

Changes since v8:
 - Fixed build on 32bits arm architectures, with:

-       return DIV_ROUND_UP((u64)buffer_width * info->char_per_block[plane],
+       return DIV_ROUND_UP_ULL((u64)buffer_width * info->char_per_block[plane],

Reviewed-by: Brian Starkey <brian.starkey@arm.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101170055.5433-1-alexandru-cosmin.gheorghe@arm.com
2018-11-02 09:55:27 +00:00
Linus Walleij
fcec4163af drm/panel: Add simple panel mode for the ARM RTSM
Having failed any attempts at a more generic solution,
I fall back to the very specific solution: define a simple
panel for the ARM RTSM emulated platforms.

I am doing this so we can convert all old users from the
previous fbdev driver to the PL111 DRM driver.

This works fine as far as I can test, provided the
device tree for RTSM AEMv8 is augmented accordingly.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20181026111334.3365-1-linus.walleij@linaro.org
2018-11-02 09:11:20 +01:00
Jani Nikula
a7c0149f16 drm/i915: also group device info array helper macros with others
Keep the register choosing macros together. No functional changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-4-jani.nikula@intel.com
2018-11-02 09:17:13 +02:00
Jani Nikula
8d97b4a936 drm/i915: reorder and reindent the register choosing helper wrappers
Try to make it slightly less of an eye sore. No functional changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-3-jani.nikula@intel.com
2018-11-02 09:17:03 +02:00
Jani Nikula
2fcc2fd0d6 drm/i915: define _MMIO_PLANE() in terms of _PLANE() not _MMIO_PIPE()
Minor semantic nit, no functional changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-2-jani.nikula@intel.com
2018-11-02 09:16:52 +02:00
Jani Nikula
74c1e82642 drm/i915: remove palette_offsets from device info in favor of _PICK()
The device info offset arrays for unevenly spaced register offsets is
great for widely used registers. However, the palette registers are only
used in one function, i9xx_load_luts_internal(), and only for GMCH
platforms, wasting device info. Replace palette_offsets with _PICK() in
palette register definition.

While the use of _PICK() does not check for pipe C existence, neither
does the current offset array usage, and leads to bogus address when
pipe C is passed to PALETTE() on non-CHV. Using _PICK() at least leads
to a sensible register offset, just non-existing on non-CHV. Either way,
this shouldn't happen anyway.

Remove unused old palette macros while at it.

Bloat-o-meter results below for completeness.

add/remove: 0/0 grow/shrink: 3/6 up/down: 94/-278 (-184)
Function                                     old     new   delta
i9xx_load_luts_internal                      394     483     +89
i915_driver_load                            5103    5107      +4
g4x_pre_enable_dp                            378     379      +1
intel_engines_init_mmio                     1117    1116      -1
intel_engine_lookup_user                      47      46      -1
hdmi_port_clock_valid                        310     309      -1
gen11_irq_handler                            707     706      -1
intel_device_info_dump_runtime               329     311     -18
intel_device_info_runtime_init              5166    4910    -256
Total: Before=918650, After=918466, chg -0.02%

add/remove: 0/0 grow/shrink: 0/48 up/down: 0/-576 (-576)
Data                                         old     new   delta
intel_valleyview_info                        200     188     -12
intel_skylake_gt4_info                       200     188     -12
intel_skylake_gt3_info                       200     188     -12
intel_skylake_gt2_info                       200     188     -12
intel_skylake_gt1_info                       200     188     -12
intel_sandybridge_m_gt2_info                 200     188     -12
intel_sandybridge_m_gt1_info                 200     188     -12
intel_sandybridge_d_gt2_info                 200     188     -12
intel_sandybridge_d_gt1_info                 200     188     -12
intel_pineview_info                          200     188     -12
intel_kabylake_gt3_info                      200     188     -12
intel_kabylake_gt2_info                      200     188     -12
intel_kabylake_gt1_info                      200     188     -12
intel_ivybridge_q_info                       200     188     -12
intel_ivybridge_m_gt2_info                   200     188     -12
intel_ivybridge_m_gt1_info                   200     188     -12
intel_ivybridge_d_gt2_info                   200     188     -12
intel_ivybridge_d_gt1_info                   200     188     -12
intel_ironlake_m_info                        200     188     -12
intel_ironlake_d_info                        200     188     -12
intel_icelake_11_info                        200     188     -12
intel_i965gm_info                            200     188     -12
intel_i965g_info                             200     188     -12
intel_i945gm_info                            200     188     -12
intel_i945g_info                             200     188     -12
intel_i915gm_info                            200     188     -12
intel_i915g_info                             200     188     -12
intel_i865g_info                             200     188     -12
intel_i85x_info                              200     188     -12
intel_i845g_info                             200     188     -12
intel_i830_info                              200     188     -12
intel_haswell_gt3_info                       200     188     -12
intel_haswell_gt2_info                       200     188     -12
intel_haswell_gt1_info                       200     188     -12
intel_gm45_info                              200     188     -12
intel_geminilake_info                        200     188     -12
intel_g45_info                               200     188     -12
intel_g33_info                               200     188     -12
intel_coffeelake_gt3_info                    200     188     -12
intel_coffeelake_gt2_info                    200     188     -12
intel_coffeelake_gt1_info                    200     188     -12
intel_cherryview_info                        200     188     -12
intel_cannonlake_info                        200     188     -12
intel_broxton_info                           200     188     -12
intel_broadwell_rsvd_info                    200     188     -12
intel_broadwell_gt3_info                     200     188     -12
intel_broadwell_gt2_info                     200     188     -12
intel_broadwell_gt1_info                     200     188     -12
Total: Before=195529, After=194953, chg -0.29%

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-1-jani.nikula@intel.com
2018-11-02 09:16:33 +02:00
Jani Nikula
7a085c3aad Merge drm/drm-next into drm-intel-next-queued
Although there's nothing crucial missing, it's been a long time since
the last backmerge. Catch up with drm-next.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2018-11-02 09:01:28 +02:00
Dave Airlie
f9885ef875 Merge tag 'drm-intel-next-fixes-2018-10-25' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- Fix to avoid link retraining workaround on eDP (the other is a comment change)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181025131836.GA2296@jlahtine-desk.ger.corp.intel.com
2018-11-02 15:17:57 +10:00
Anusha Srivatsa
18cde299df drm/i915/icl: Fix DSS_CTL register names
This patch fixes the naming of the registers:

s/PIPE_DSS_CTL/ICL_PIPE_DSS_CTL

And also fix the hex values to lower case, to match
rest of the definitions.

Manasi noticed this with the patch that was merged.

v2: fix "Fixes" tag.

Fixes: 8b1b558d69 ("drm/i915/icl: Add DSS_CTL Registers")
Suggested-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101214216.8958-1-anusha.srivatsa@intel.com
2018-11-01 22:00:04 -07:00