yamllint has a quoted string check. Enable the check aligned with the
DT schema style which is only using quotes when necessary with the
exception of regex patterns. There's also the frequent occurrence of '/'
which we allow rather than fixing.
Link: https://lore.kernel.org/all/20230324202243.2442956-1-robh@kernel.org/
Signed-off-by: Rob Herring <robh@kernel.org>
Georgi writes:
interconnect changes for 6.6
This pull request contains the interconnect changes for the 6.6-rc1 merge
window which is a mix of core and driver changes with the following highlights:
Core changes:
- New generic test client driver that allows issuing bandwidth requests
between endpoints via debugfs.
- Annotate all structs with flexible array members with the __counted_by
attribute.
- Introduce new icc_bw_lock for cases where we need to serialize bandwidth
aggregation and update to decouple that from paths that require memory
allocation.
Driver changes:
- Move the Qualcomm SMD RPM bus-clocks from CCF to interconnect framework
where they actually belong. This brings power management improvements
and reduces the overhead and layering. These changes are in immutable
branch that is being pulled also into the qcom tree.
- Fixes for QUP nodes on SM8250.
- Enable sync_state and keepalive for QCM2290.
- Enable sync_state for SM8450.
- Improve enable_mask-based BCMs handling and fix some bugs.
- Add compatible string for the OSM-L3 on SDM670.
- Add compatible strings for SC7180, SM8250 and SM6350 bandwidth monitors.
- Expand and retire the DEFINE_QNODE and DEFINE_QBCM macros, which have
become ugly beasts with many different arguments.
Signed-off-by: Georgi Djakov <djakov@kernel.org>
* tag 'icc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (64 commits)
interconnect: Add debugfs test client
interconnect: Reintroduce icc_get()
debugfs: Add write support to debugfs_create_str()
interconnect: qcom: icc-rpmh: Retire DEFINE_QBCM
interconnect: qcom: sm8350: Retire DEFINE_QBCM
interconnect: qcom: sm8250: Retire DEFINE_QBCM
interconnect: qcom: sm8150: Retire DEFINE_QBCM
interconnect: qcom: sm6350: Retire DEFINE_QBCM
interconnect: qcom: sdx65: Retire DEFINE_QBCM
interconnect: qcom: sdx55: Retire DEFINE_QBCM
interconnect: qcom: sdm845: Retire DEFINE_QBCM
interconnect: qcom: sdm670: Retire DEFINE_QBCM
interconnect: qcom: sc7180: Retire DEFINE_QBCM
interconnect: qcom: icc-rpmh: Retire DEFINE_QNODE
interconnect: qcom: sm8350: Retire DEFINE_QNODE
interconnect: qcom: sm8250: Retire DEFINE_QNODE
interconnect: qcom: sm8150: Retire DEFINE_QNODE
interconnect: qcom: sm6350: Retire DEFINE_QNODE
interconnect: qcom: sdx65: Retire DEFINE_QNODE
interconnect: qcom: sdx55: Retire DEFINE_QNODE
...
Updates for v6.6, which includes a backmerge of msm-fixes to avoid conficts.
Core:
- SM6125 MDSS support
DPU:
- SM6125 DPU support
- Added subblocks to display snapshot
- Use UBWC data from MDSS driver rather than duplicating it
- dpu_core_perf cleanup
DSI:
- Enabled burst mode to fix CMD mode panels
- Runtime PM support
- refgen regulator support
DSI PHY:
- SM6125 support in 14nm DSI PHY driver
GPU:
- Rework GPU identification to prepare for a7xx, and other a7xx prep
- Cleanups and fixes
- Disallow legacy relocs on a6xx and newer
- a690: switch to using a660_gmu.bin fw as this is what we have in
linux-firmware and we see no evidence that it should be different
from other a660 family (a6xx subgen 4) devices
- Submit overhead opts, 1.6x faster for NO_IMPLICIT_SYNC commits with
100 BOs to 2.5x faster for 1000 BOs
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGv_01g-edjdfKLWWcb-rO5aSyLsv5FpbKrTkXVL9+ngTQ@mail.gmail.com
Update the pca954x bindings to add support for the Maxim MAX735x/MAX736x
chips. The functionality will be provided by the existing pca954x driver.
For chips that are powered off by default add a regulator called vdd-supply.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Only some of the PCA954x compatible ICs have interrupt
capability, but the binding advertises it on all ICs.
Sync the dt-binding with the driver and only advertise it on:
- nxp,pca9542
- nxp,pca9543
- nxp,pca9544
- nxp,pca9545
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR". Correct it
to keep consistent format and avoid copy-paste issues.
Correct also the format // -> .* in few Allwinner binding headers as
pointed out by checkpatch:
WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
Merge series from Xingyu Wu <xingyu.wu@starfivetech.com>:
This patch series adds I2S support for the StarFive JH7110 RISC-V
SoC based on Designware I2S controller. There has three I2S channels
(RX/TX0/TX1) on the JH7110 SoC, one of which is for record(RX) and
two for playback(TX).
The first patch adds support for the StarFive JH7110 SoC in the
Designware I2S bindings.
The second patch adds the ops to get data from platform bus in the
I2S driver.
The third patch adds support for the StarFive JH7110 SoC in
the Designware I2S driver.
The fourth patch fixes the name of I2STX1 pinmux.
The last patch adds device node of I2S RX/TX0/TX1 in JH7110 dts.
This patch series is based on Linux-next(20230818) which is merge
clock, syscon and dma nodes for the StarFive JH7110 SoC.
The series has been tested and works normally on the VisionFive 2
board by plugging an audio expansion board.
A lot of home routers have NVMEM fixed cells containing MAC address that
need some further processing. In ~99% cases MAC needs to be:
1. Optionally parsed from ASCII format
2. Increased by a vendor-picked value
There was already an attempt to design a binding for that at NVMEM
device level in the past. It wasn't accepted though as it didn't really
fit NVMEM device layer.
The introduction of NVMEM fixed-cells layout seems to be an opportunity
to provide a relevant binding in a clean way.
This commit adds a *generic* compatible string: "mac-base". As always it
needs to be carefully reviewed.
OpenWrt project currently supports ~300 home routers that have NVMEM
cell with binary-stored base MAC.T hose devices are manufactured by
multiple vendors. There are TP-Link devices (76 of them), Netgear (19),
D-Link (11), OpenMesh (9), EnGenius (8), GL.iNet (8), ZTE (7),
Xiaomi (5), Ubiquiti (6) and more. Those devices don't share an
architecture or SoC.
Another 200 devices have base MAC stored in an ASCII format (not all
those devices have been converted to DT though).
It would be impractical to provide unique "compatible" strings for NVMEM
layouts of all those devices. It seems like a valid case for allowing a
generic binding instead. Even if this binding will not be sufficient for
some further devices it seems to be useful enough as it is.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20230823132744.350618-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add the StarFive JH7110 (TX0/TX1/RX channel) SoC support in the bindings
of Designware I2S controller. The I2S controller needs two reset items
to work properly on the JH7110 SoC. And TX0 channel as master mode needs
5 clock items and TX1/RX channels as slave mode need 9 clock items on
the JH7110 SoC. The RX channel needs System Register Controller property
to enable it and other platforms do not need it.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230821144151.207339-2-xingyu.wu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
The pattern for the nodename only allows t-phy@... , however, for the case
when the t-phy has no `reg` and only `ranges` (basically when the t-phy
is just a parent node), dtc will throw this warning:
Warning (unit_address_vs_reg): /t-phy@1a243000: node has a unit name, but no reg or ranges property
For a node like this:
sata_phy: t-phy@1a243000 {
ranges;
sata_port: sata-phy@1a243000 {
reg = <0 0x1a243000 0 0x0100>;
};
};
it is normal that the parent node 't-phy' would be without any address, as in:
sata_phy: t-phy {
ranges;
sata_port: sata-phy@1a243000 {
reg = <0 0x1a243000 0 0x0100>;
};
};
because being just a holder it does not have its own reg.
However the binding does not allow such a name for the t-phy, so with this
patch, making the `@[0-9a-f]+` part optional, such node is possible.
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230814093931.9298-1-eugen.hristev@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This pull request contains Broadcom ARM-based Device Tree changes for
6.6, please pull the following:
- Arinc adds support for the Asus RT-AC3100 router based upon the
BCM47094 SoC
- Krzysztof splits interrupt properties per cell such that they are mode
readable and adds missing spaces in front of node names/labels
- Rafal updates the BCM5301X DTS to correct PCIe, SPI over GPIO
properties. He describes the Ethernet links to internal switch ports
and then updates the BCM53573 binding and Ethernet properties by
declaring the BCM53125 external switch on port 5, add Ethernet links
and
disables the second Ethernet MAC on Luxul devices.
- Dan describes the Wi-Fi regulatory mappings for Luxul devices
- Stanislav updates the bcm28155 DTS to use node labels
- Linus adds SEAMA compatible properties to MTD partitions
- Aleksey updates the Linksys EA6500 v2 to have the full 256MiB of DRAM
available
- Stefan updates a number of BCM283x nodes to confirm to DTS schema:
pinctrl, DMA controllers and PWM cells.
* tag 'arm-soc/for-6.6/devicetree' of https://github.com/Broadcom/stblinux: (23 commits)
ARM: dts: BCM5301X: Add DT for ASUS RT-AC3100
dt-bindings: arm: bcm: add bindings for ASUS RT-AC3100
ARM: dts: broadcom: split interrupts per cells
ARM: dts: BCM53573: Disable second Ethernet on Luxul devices
ARM: dts: BCM53573: Add Ethernet interfaces links
ARM: dts: BCM53573: Add BCM53125 switch port 5
ARM: dts: BCM53573: Describe BCM53125 switch ports in the main DTS
ARM: dts: BCM53573: Fix Tenda AC9 switch CPU port
ARM: dts: bcm28155-ap: use node labels
ARM: dts: bcm5301x: Add SEAMA compatibles
ARM: dts: BCM53573: Fix Ethernet info for Luxul devices
ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys EA6500 V2
dt-bindings: arm: bcm: add BCM53573 SoCs family binding
ARM: dts: BCM53573: Use updated "spi-gpio" binding properties
ARM: dts: BCM53573: Add cells sizes to PCIe node
ARM: dts: BCM53573: Drop nonexistent #usb-cells
ARM: dts: BCM53573: Drop nonexistent "default-off" LED trigger
ARM: dts: BCM5301X: Add Ethernet interfaces links
ARM: dts: BCM5301X: Add Wi-Fi regulatory mappings for Luxul devices
ARM: dts: broadcom: add missing space before {
...
Link: https://lore.kernel.org/r/20230818164539.2871539-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
RISC-V Devicetrees for v6.6 Part 2
T-Head:
Add a second minimal devicetree for the second board using the th1520
SoC, the BeagleV Ahead. As with the Lichee Pi 4a, this is sufficient
only for booting to a console, with work on the mmc, clocks and ethernet
sides of things under way. A relicense to a dual licence for the
existing devicetree files is also done, for good measure.
RISC-V Devicetrees for v6.6-pt2
StarFive:
Fix the sort order of some nodes that I resolved incorrectly during a
merge conflict.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.6-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: change TH1520 files to dual license
riscv: dts: thead: add BeagleV Ahead board device tree
dt-bindings: riscv: Add BeagleV Ahead board compatibles
riscv: dts: starfive: fix jh7110 qspi sort order
Link: https://lore.kernel.org/r/20230819-unwieldy-railing-9bba2b176aa7@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Qualcomm ARM64 DeviceTree updates for v6.6
Initial support for the SM4450 platform and the QRD device thereon is
added.
The IPQ5018 platform is introduced, and the RDP432-C2 board thereon.
A shared definition of the IPQ5332 RDP is introduced, as is GPIO-based
LEDs and buttons.
On the IPQ9574 RDP433 USB, CPU cooling maps and regulators are added.
On MSM8916, the D3 camera mezzanine is improved and refactored out to
its own dts. The Samsung Galaxy S4 Mini gains support for its PMIC with
charger, while Samsung Galaxy J5 and E5 gains touchscreen support.
A few fixes for MSM8939 are introduced, and initial support for Samsung
Galaxy A7 is add.
Support for scaling the cache bus fabric is introduced on MSM8996. A
missing interrupt for the USB2 controller is added. The touchscreen vio
supply on Xiaomi Mi 5 is corrected, and a few other cleanups are
introduces across other devices.
The display controller is introduced for MSM8998, a few clock fixes are
introduced and missing power domains are added for the multimedia
subsystem iommu.
Reserved memory-regions and reserved GPIO lists are updated for the
QDU/QRU1000 IDPs.
USB3 PHY is added to the QCM2290, the RB1 gains regulators and GPU is
enabled for the RB2.
PCIe and Ethernet support is introduced on SA8775P, and enabled for the
Ride board.
On SC7180 the PSCI integration is refactored, to allow supporting
devices with the Qualcomm firmware. BWMON is introduced, alongside the
CPUfreq-based bus voting.
A number of fixes are added for SC8180X, on the Primus and Lenovo Flex
5G devices pmic_glink is introduced and wired up, to provide support for
external display.
Missing SCM interconnect is added to SC8280XP, and the PDC is marked as
wakeup-parent of TLMM. On the CRD the gpio for vreg_misc_3p3 is
corrected and a few regulators are renamed to align with schematics. The
Lenovo Thinkpad X13s gains camera activity LED and a set of previously
reserved GPIOs are released. The SA8540P Ride platform gains RTC
support.
For SDM670 CPU and L3 frequency scaling is added, the PDC is introduced
and wired up as wakeup-parent of the TLMM.
On SDM845 the UFS controller gains interconnect path description,
power-domain information is added to GCC and minimum frequency of the
UFS ICE is corrected. On RB3 continuous splash memory region is
described, and the camera subsystem is enabled. On the Lenovo Yoga C630
a missing power supply for the display panel is added, and the debug
UART is introduced.
SDX75 RPMh power-domains and SPMI controller are introduces, the PMX75
PMIC is described and added to the IDP.
GPU description is added to SM6115, and together with display enabled on
the Lenovo Tab P11.
On SM635 BWMON is introduced for LLCC and DDR scaling. Display and GPU
is added, and the PDC is registered as wakeup-parent of TLMM.
L3 cache scaling is introduced on SM6375.
The DSI PHY compatible and an interrupt for I2C7 are corrected for
SM8150, on the Sony Xperia 1 and 5 the ramoops pmsg size is corrected.
On SM8250 BWMONs are introduced for DDR and LLCC scaling, the UFS node
gains interconnect paths, SMMU is marked as DMA coherent and dynamic
power coefficients are updated. On Sony Xperia 1 II and 5 II GPIO line
names are updated.
On SM8350 missing cluster sleep states and LMH interrupts are added,
the CPU compatibles are corrected and APR and LPASS pinctrl support is
introduced. The HDK gains uSD card support and PMK8350 is added.
For SM8450 support for RNG and RPMh stats are added, the ICE handling is
extracted from the UFS node and the display subsystem gains a missing
interconnect path. Thermal description is improved for the HDK.
On SM8550 MTP and QRD the pmic_glink is introduced, to provide
DisplayPort output. A missing regulator supply is also added.
A few platforms that happens to share the RPMH power-domain resource
identifier constants are migrated to new generic defines. ADC channel
names are generalized on various PMICs.
A variety of devices gain chassis-type, and the GIC_SPI constant is
replacing the 0 across a few different platforms.
* tag 'qcom-arm64-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (215 commits)
arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Add PDC
arm64: dts: qcom: msm8916-samsung-e5: Add touchscreen
arm64: dts: qcom: sc7180: Split up TF-A related PSCI configuration
arm64: dts: qcom: sc8280xp-x13s: Add camera activity LED
arm64: dts: qcom: sc8280xp-x13s: Unreserve NC pins
arm64: dts: qcom: msm8998: Add DPU1 nodes
arm64: dts: qcom: msm8996: Fix dsi1 interrupts
arm64: dts: qcom: sdx75-idp: Add regulator nodes
arm64: dts: qcom: sdx75: Add rpmhpd node
arm64: dts: qcom: sdx75-idp: Add pmics supported in SDX75
arm64: dts: qcom: Add pmx75 PMIC dtsi
arm64: dts: qcom: Add pm7550ba PMIC dtsi
arm64: dts: qcom: Add pinctrl gpio support for pm7250b
arm64: dts: qcom: sdx75: Add spmi node
arm64: dts: qcom: msm8998: Add missing power domain to MMSS SMMU
...
Link: https://lore.kernel.org/r/20230819034551.2537866-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
New boards are the NanoPC T6, Firefly Station P2, Radxa Rock 4SE.
Many new peripherals for the still only basic supported rk3588 soc
(PCIe2, PCIe3, USB2, SATA, Combo-Phys).
Improvements to the Rock-5a development board based on this soc (saradc,
i2c on dsi and csi, fan, eeprom, analog audio, leds, sd-card,
some regulators, pmic).
Improvements for the edgeble-neu6b (rs485, rs232, pwm-fan, rtc, sata,
sata, sd-card, pmic)
RK3399 got the PCIe endpoint node when used as a PCIe-client.
And some minor changes for some boards: spi-flash for RockPi 4,
SATA and fixed PCIe regulators for Radxa E25 and using enable-gpios
on engicam and gru boards.
* tag 'v6.6-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (46 commits)
arm64: dts: rockchip: Add NanoPC T6 PCIe Ethernet support
arm64: dts: rockchip: add rk3588 PCIe2 support
arm64: dts: rockchip: Enable internal SPI flash for ROCK Pi 4A/B/C
arm64: dts: rockchip: Add NanoPC T6
dt-bindings: arm: rockchip: Add NanoPC T6
arm64: dts: rockchip: Enable SATA on Radxa E25
arm64: dts: rockchip: Fix PCIe regulators on Radxa E25
arm64: dts: rockchip: switch px30-engicam to enable-gpios
arm64: dts: rockchip: switch rk3399-gru boards to enable-gpios
arm64: dts: rockchip: add PCIe3 support for rk3588
arm64: dts: rockchip: fix/update sdmmc properties for rock-5a and -5b
arm64: dts: rockchip: add USB2 to rk3588s-rock5a
arm64: dts: rockchip: add USB2 to rk3588-rock5b
arm64: dts: rockchip: add USB2 to rk3588-evb1
arm64: dts: rockchip: add USB2 support for rk3588
arm64: dts: rockchip: Enable RS485 for edgeble-neu6b
arm64: dts: rockchip: Enable RS232 for edgeble-neu6b
arm64: dts: rockchip: Enable PWM FAN for edgeble-neu6b
arm64: dts: rockchip: Enable RTC for edgeble-neu6b
arm64: dts: rockchip: Enable SATA for edgeble-neu6b
...
Link: https://lore.kernel.org/r/7414564.rnE6jSC6OK@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT for v6.6, round 1
Highlights:
----------
- MCU:
- Add CAN support on stm32f746.
- Add touchscreen support (edt-ft5306) on stm32f746-disco.
- Add support to Rocktech RK043FN48H display on stm32f746-disco
board.
- Add gpio-ranges for stm32f7 to fix boot issue.
- MPU:
- STM32MP13:
- Remove shmem for scmi-optee to match with OP-TEE configuration.
- Enable OP-TEE asynchronous notification by using PPI#15.
- Expose and use SCMI regulators on stm32mp135f-dk.
- STMP32MP15:
- Remove shmem for scmi-optee to match with OPTEE configuration
- Deduplicate DSI node to fix #address-cells/#size-cells issue on
boards using it.
- ST:
- Fix dts check warnings on stm32mp15-scmi boards.
- DH:
- Add missing detach mailbox for DHCOM and DHCOR SoM.
- Odyssey:
- Add missing detach mailbox for Odyssey SoM.
- OCTAVO:
- Add Linux Automation Test Automation Controller (LXA TAC) based
on Octavo Systems OSD32MP15x SiP. It contains: eMMC,
DSA-capable ETH switch (2 ports), dual CAN...
It adds two boards support: lxa-tac-gen1 and lxa-tac-gen2 based
on STM32MP157.
- PROTONIC:
- Add Power over Data Line (PoDL) Power Source Equipment (PSE)
regulator nodes on PRTT1C board. It allows power delivery and
data transmission over a single twisted pair.
* tag 'stm32-dt-for-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (29 commits)
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
ARM: dts: st: Add gpio-ranges for stm32f769-pinctrl
ARM: dts: st: Add gpio-ranges for stm32f746-pinctrl
ARM: dts: st: stm32mp157c-emstamp: correct regulator-active-discharge
ARM: dts: st: stm32mp157c-emstamp: drop incorrect vref_ddr property
ARM: dts: stm32: fix dts check warnings on stm32mp15-scmi
ARM: dts: stm32: Add missing detach mailbox for DHCOR SoM
ARM: dts: stm32: Add missing detach mailbox for DHCOM SoM
ARM: dts: stm32: Add missing detach mailbox for Odyssey SoM
ARM: dts: stm32: Add missing detach mailbox for emtrion emSBC-Argon
ARM: dts: stm32: prtt1c: Add PoDL PSE regulator nodes
ARM: dts: stm32: add touchscreen on stm32f746-disco board
ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
ARM: dts: stm32: re-add CAN support on stm32f746
...
Link: https://lore.kernel.org/r/c0524a16-ab27-0cb5-8e7b-c12f7bde7e0d@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
