Commit Graph

33192 Commits

Author SHA1 Message Date
Janne Grunau
869c942fb5 dt-bindings: pci: apple,pcie: Add t8112 support
The block found in the Apple M2 SoC is compatible with the existing
driver, and supports 4 downstream ports like the t6000 one.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:20 +09:00
Janne Grunau
20fa978cd9 dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string
"apple,t8112-nvme-ans2" as found on Apple M2 SoCs is compatible with the
existing driver. Add its SoC specific compatible string to allow special
handling if it'll be necessary.
t8112 uses only 2 power-domains as no 4 and 8 TB configurations are
offered.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:19 +09:00
Janne Grunau
695ea8cc5e dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles
The mailbox hardware remains unchanged on M2 SoCs so just add its
per-SoC compatible.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:18 +09:00
Janne Grunau
667b44ee3a dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string
"apple,t8112-sart" as found on the Apple M2 SoC appears to be SART3 as
well. To allow for later discovered incompatibilities use
'"apple,t8112-sart", "apple,t6000-sart"' as compatible string.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:12 +09:00
Janne Grunau
93b415b2e1 dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
The Apple M2 SoC uses AICv2 and is compatible with the existing driver.
Add its per-SoC compatible.
Since multi-die versions of the M2 are not expected decrease
'#interrupt-cells' to 3 for apple,t8112-aic. This is seamlessly handled
inside the driver.

Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:05 +09:00
Janne Grunau
355d090ecb dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles
These are the CPU cores in the Apple silicon M2 SoC.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:04 +09:00
Janne Grunau
1f21734b14 dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible
The block on the Apple M2 SoC is compatible with the existing driver so
add its per-SoC compatible.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:02 +09:00
Janne Grunau
bbdd33769d dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible
The block on Apple M2 SoCs is compatible with the existing driver so
just add its per-SoC compatible.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:38:59 +09:00
Hector Martin
4d93b3a974 dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible
Add the apple,t8112-pmgr-pwrstate compatible for the Apple M2 SoC.

This goes after t8103. The sort order logic here is having SoC numeric
code families in release order, and SoCs within each family in release
order:

- t8xxx (Apple HxxP/G series, "phone"/"tablet" chips)
  - t8103 (Apple H13G/M1)
  - t8112 (Apple H14G/M2)
- t6xxx (Apple HxxJ series, "desktop" chips)
  - t6000 (Apple H13J(S)/M1 Pro)
  - t6001 (Apple H13J(C)/M1 Max)
  - t6002 (Apple H13J(D)/M1 Ultra)

Note that t600[0-2] share the t6000 compatible where the hardware is
100% compatible, which is usually the case in this highly related set
of SoCs.

Reviewed-by: Janne Grunau <j@jannau.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:38:43 +09:00
Dario Binacchi
e43250c0ac dt-bindings: net: can: add STM32 bxcan DT bindings
Add documentation of device tree bindings for the STM32 basic extended
CAN (bxcan) controller.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/all/20230328073328.3949796-3-dario.binacchi@amarulasolutions.com
[mkl: drop unneeded quotes]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-03-28 11:43:35 +02:00
Dario Binacchi
b341be6de9 dt-bindings: arm: stm32: add compatible for syscon gcan node
Since commit ad440432d1 ("dt-bindings: mfd: Ensure 'syscon' has a
more specific compatible") it is required to provide at least 2 compatibles
string for syscon node.
This patch documents the new compatible for stm32f4 SoC to support
global/shared CAN registers access for bxCAN controllers.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/all/20230328073328.3949796-2-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2023-03-28 11:43:35 +02:00
Rob Herring
1b61fdfdd6 dt-bindings: soc: amlogic: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230327170222.4107746-1-robh@kernel.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-03-28 09:48:54 +02:00
Jagan Teki
073b8f9e8e dt-bindings: display: exynos: dsim: Add NXP i.MX8M Plus support
Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC.

Add dt-bingings for it.

Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2023-03-28 09:05:41 +09:00
Jagan Teki
0daee58d88 dt-bindings: display: exynos: dsim: Add NXP i.MX8M Mini/Nano support
Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC.

Add dt-bingings for it.

Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2023-03-28 09:05:41 +09:00
Heiner Kallweit
94df03a452 dt-bindings: pinctrl: Convert Amlogic Meson pinctrl binding
Convert Amlogic Meson pin controller binding to yaml.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/dd29c1b7-05db-dd98-df40-20a238d89a96@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-27 23:47:52 +02:00
Andre Przywara
c908060de3 dt-bindings: arm: sunxi: document MangoPi MQ-R board names
The MangoPi MQ-R board is a small development board, using Allwinner
SoCs with co-packaged DRAM. There are versions with a RISC-V core and
ones with two Arm Cortex-A7 cores.

Add the board/SoC compatible string pair to the list of known boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230320005249.13403-4-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-27 22:45:22 +02:00
Álvaro Fernández Rojas
cd04bbb924 dt-bindings: clock: Add BCM63268 timer binding
Document the Broadcom BCM63268 Clock and Reset controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230322171515.120353-4-noltari@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 12:23:52 -07:00
Alexander Stein
51f2be462f dt-bindings: clk: rs9: Add 9FGV0441
This is a 4-channel variant of 9FGV series.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20230310075535.3476580-2-alexander.stein@ew.tq-group.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 10:50:57 -07:00
Marek Vasut
66a20af59e dt-bindings: clk: si521xx: Add Skyworks Si521xx I2C PCIe clock generators
Add binding for Skyworks Si521xx PCIe clock generators. This binding
is designed to support Si52144/Si52146/Si52147 series I2C PCIe clock
generators, tested model is Si52144. It should be possible to add
Si5213x series as well.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20230118191521.15544-1-marex@denx.de
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-27 10:44:29 -07:00
Janne Grunau
640a3b7a3d dt-bindings: arm-pmu: Add PMU compatible strings for Apple M2 cores
The PMUs on the Apple M2 cores avalanche and blizzard CPU are compatible
with M1 ones. As on M1 we don't know exactly what the counters count so
use a distinct compatible for each micro-architecture.
Apple's PMU counter description omits a counter for M2 so there
is some variation on the interpretation of the counters.

Signed-off-by: Janne Grunau <j@jannau.net>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230214-apple_m2_pmu-v1-1-9c9213ab9b63@jannau.net
Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27 15:15:14 +01:00
Konrad Dybcio
3ad6585509 dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMU
Both of these SoCs have a Qualcomm MMU500 implementation of SMMU
in front of their GPUs that expect 3 clocks. Both of them also have
an APPS SMMU that expects no clocks. Remove qcom,sm61[12]5-smmu-500
from the "no clocks" list (intentionally 'breaking' the schema checks
of APPS SMMU, as now it *can* accept clocks - with the current
structure of this file it would have taken a wastefully-long time to
sort this out properly..) and add necessary yaml to describe the
clocks required by the GPU SMMUs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27 12:37:01 +01:00
Konrad Dybcio
16d1646871 dt-bindings: arm-smmu: Add SM8350 Adreno SMMU
Document the Adreno SMMU present on SM8350.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-2-66ab655fbfd5@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27 12:31:15 +01:00
Konrad Dybcio
5c3686616b dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs
qcom,smmu-500 was introduced to prevent people from adding new
compatibles for what seems to roughly be the same hardware. Use it for
qcom,adreno-smmu-compatible targets as well.

While at it, fix the "arm,smmu-500" -> "arm,mmu-500" typo in the comment.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-1-66ab655fbfd5@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27 12:31:14 +01:00
Abel Vesa
7f061c19f6 dt-bindings: arm-smmu: Add compatible for SM8550 SoC
Add the SoC specific compatible for SM8550 implementing
arm,mmu-500.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230207-topic-sm8550-upstream-smmu-bindings-v3-1-cb15a7123cfe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
2023-03-27 12:28:18 +01:00
H. Nikolaus Schaller
f47fc3aa34 ARM: dts: omap3-gta04: fix compatible record for GTA04 board
Vendor of the GTA04 boards is and always was
Golden Delicious Computers GmbH&Co. KG, Germany
and not Texas Instruments.

Maybe, TI was references here because the GTA04 was based on
the BeagleBoard design which is designated as "ti,omap3-beagle".

While we are looking at vendors of omap3 based devices, we also
add the record for OpenPandora. The DTS files for the pandora
device already make use of it.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Message-Id: <38b49aad0cf33bb5d6a511edb458139b58e367fd.1676566002.git.hns@goldelico.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2023-03-27 11:16:20 +03:00
Álvaro Fernández Rojas
a20869b3a7 dt-bindings: net: dsa: b53: add BCM53134 support
BCM53134 are B53 switches connected by MDIO.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2023-03-27 08:29:54 +01:00
Marek Vasut
9320fad102 dt-bindings: soc: imx-blk-ctrl: Drop leading label in blk-ctrl in examples
Drop the leading label in block controller examples, it is unused.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:50:54 +08:00
Marek Vasut
706b511f0c dt-bindings: soc: imx8m-blk-ctrl: Rename blk_ctrl to blk-ctrl in examples
Rename blk_ctrl@ to blk-ctrl (with dash instead of underscore) in examples
so that they would match the imx8m[mn].dtsi in current Linux kernel.

Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:50:43 +08:00
Marek Vasut
d757845451 dt-bindings: arm: Add DH electronics i.MX8M Plus DHCOM on PDK3
Add DT compatible string for DH electronics i.MX8M Plus DHCOM on PDK3
evaluation board into YAML DT binding document. This setup is a general
purpose SoM evaluation board.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:47:53 +08:00
Andreas Kemnade
d37c36001e dt-bindings: arm: fsl: add compatible string for Tolino Vision
Add a compatible string for the Tolino Vision eBook reader.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:43:13 +08:00
Michal Vokáč
5c984deeda dt-bindings: arm: fsl: Add Y Soft IOTA Phoenix, Lynx, Pegasus and Pegasus+
These i.MX6 boards are based on a facelifted PCB from the previous designs.
Routing for some unused parts was completely removed (uSD card, PCIe, audio
codec) and some new parts were added (supercap backed RTC, secure element,
PWM audio, GPIO button).

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:25:34 +08:00
Philippe Schenker
fc226f865c dt-bindings: arm: fsl: Add colibri-imx8x carrier boards
Prepare the dt-bindings for the new colibri-imx8x carrier-boards Aster
and Iris.

The Toradex SoM standard is called Colibri, fix the typo.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-03-27 10:08:01 +08:00
Rob Herring
4334aec07a dt-bindings: display: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Miguel Ojeda <ojeda@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #display/msm
Link: https://lore.kernel.org/r/20230320233823.2919475-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2023-03-24 14:20:49 -05:00
Rob Herring
a72b7bbc70 dt-bindings: mmc: fujitsu: Add Socionext Synquacer
Add support for Socionext Synquacer SDHCI. This binding has been in use for
some time.

The interrupts were not documented. The driver only uses the first
interrupt, but the DT and example have 2 interrupts. The 2nd one is
unknown. "dma-coherent" was also not documented, but is used on Synquacer.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230319173006.30455-1-robh@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-03-24 16:48:01 +01:00
A, Rashmi
8e8559ddfb dt-bindings: mmc: Remove bindings for Intel Thunder Bay SoC"
Remove Thunder Bay specific code as the product got cancelled
and there are no end customers or users.

Signed-off-by: A, Rashmi <rashmi.a@intel.com>
Reviewed-by: Hunter, Adrian <adrian.hunter@intel.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230316120549.21486-3-rashmi.a@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-03-24 16:48:01 +01:00
Johan Hovold
b6b88111c0 dt-bindings: net: wireless: add ath11k pcie bindings
Add devicetree bindings for Qualcomm ath11k PCIe devices such as WCN6855
for which the calibration data variant may need to be described.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20230321094011.9759-2-johan+linaro@kernel.org
2023-03-24 16:51:56 +02:00
Rob Herring
77987b872f dt-bindings: input: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # for mediatek,mt6779-keypad.yaml
Link: https://lore.kernel.org/r/20230320234718.2930154-1-robh@kernel.org
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2023-03-23 18:51:14 -07:00
Icenowy Zheng
e89556d635 dt-binding: arm: sunxi: add two board compatible strings
The SourceParts PopStick is a F1C200s-based stick-shaped SBC. The
publicly released version is actually v1.1.
The Lctech Pi F1C200s is a small development board using the Allwinner
F1C200s SoC.

Add the compatible string lists to the bindings documentation.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-5-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23 21:57:33 +01:00
Icenowy Zheng
eef696356f dt-bindings: vendor-prefixes: add Source Parts and Lctech names
Source Parts Inc. [1] is a company that makes a series of SBCs, SoMs,
etc under a brand called Popcorn Computer [2].
Shenzen LC Technology [3] makes various boards and related products
around IoT and AI technology. They used the "Cherry Pi" brand name before.

Add both companies' names to the vendor prefixes list.

[1] https://source.parts/
[2] https://popcorncomputer.com/
[3] http://www.chinalctech.com

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20230319212936.26649-4-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-03-23 21:57:33 +01:00
Neil Armstrong
a33113f736 dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports
Document the optional ports subnode to describe the High-Speed
and Super-Speed connections as separate OF graph links.

The ports property is an alternative to the already documented
single port subnode property.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230130-topic-sm8450-upstream-pmic-glink-v5-5-552f3b721f9e@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-23 17:36:45 +01:00
Peng Fan
092a2a78e6 dt-bindings: usb: snps,dwc3: correct i.MX8MQ support
The previous i.MX8MQ support breaks rockchip,dwc3 support,
so use select to restrict i.MX8MQ support and avoid break others.

Fixes: 3754c41c76 ("dt-bindings: usb: snps,dwc3: support i.MX8MQ")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230323035531.3808192-1-peng.fan@oss.nxp.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-03-23 17:35:19 +01:00
Luca Weiss
d4856dccda dt-bindings: leds: spmi-flash-led: Add pm6150l compatible
Add the compatible for the flash-led block found on pm6150l PMIC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20221209-fp4-pm6150l-flash-v1-1-531521eb2a72@fairphone.com
2023-03-23 14:54:00 +00:00
Kathiravan T
102262767e dt-bindings: clock: qcom,a53pll: add IPQ5332 compatible
Add IPQ5332 compatible to A53 PLL bindings.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230217083308.12017-3-quic_kathirav@quicinc.com
2023-03-23 07:27:01 -07:00
Saalim Quadri
829d78e3ea ASoC: dt-bindings: ak5558: Convert to dtschema
Convert the AK5558 ADC audio codec bindings to DT schema.

Signed-off-by: Saalim Quadri <danascape@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230322200949.8986-1-danascape@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-23 14:08:09 +00:00
Krzysztof Kozlowski
22ead09ba4 dt-bindings: mailbox: qcom,apcs-kpss-global: fix SDX55 'if' match
The qcom,sdx55-apcs-gcc is followed by another compatible (syscon), thus
the 'if' clause must match by contains.

Fixes: 0d17014e91 ("dt-bindings: mailbox: Add binding for SDX55 APCS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322173559.809805-2-krzysztof.kozlowski@linaro.org
2023-03-23 06:50:19 -07:00
Krzysztof Kozlowski
8504fa9baf dt-bindings: mailbox: qcom,apcs-kpss-global: correct SDX55 clocks
SDX55 and SDX65 DTS takes clocks in a bit different order.  Adjust
bindings to the DTS.

Fixes: 0d17014e91 ("dt-bindings: mailbox: Add binding for SDX55 APCS")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230322173559.809805-1-krzysztof.kozlowski@linaro.org
2023-03-23 06:50:19 -07:00
Keguang Zhang
722cfe4ffa dt-bindings: gpio: Add Loongson-1 GPIO
Add devicetree binding document for Loongson-1 GPIO.

Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2023-03-23 14:31:18 +01:00
Krzysztof Kozlowski
80404e4e13 ASoC: dt-bindings: wlf,wm8994: Convert to dtschema
Convert the Wolfson WM1811/WM8994/WM8958 audio codecs bindings to DT
schema.

Changes against original binding:
1. Add missing LDO1VDD-supply and LDO2VDD-supply.
2. Use "gpios" suffix for wlf,ldo1ena and wlf,ldo2ena (Linux kernel's
   gpiolib already looks for both variants).
3. Do not require AVDD1-supply and DCVDD-supply, because at least on
   Arndale board with Exynos5250 these are being supplied by internal
   LDOs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20230322193541.827291-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-23 12:24:09 +00:00
Konrad Dybcio
b8548e387f dt-bindings: mmc: sdhci-msm: Document QCM2290 SDHCI
Document the SDHCI on QCM2290.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230314-topic-2290_compats-v1-4-47e26c3c0365@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-03-23 11:48:26 +01:00
Alexandre Mergnat
e37556d947 dt-bindings: mmc: mediatek,mtk-sd: add mt8365
Add binding description for mediatek,mt8365-mmc

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230203-evk-board-support-v2-2-6ec7cdb10ccf@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2023-03-23 11:30:20 +01:00