Provide device tree support and binding information. Also provide support
for a new chip "pixcir_tangoc".
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Merge "ARM: mach-bcm: dt updatees for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
ARM: brcmstb: add misc. DT bindings for brcmstb
ARM: brcmstb: add CPU binding for Broadcom Brahma15
ARM: dts: enable SMP support for bcm21664
ARM: dts: enable SMP support for bcm28155
devicetree: bindings: document Broadcom CPU enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge "mvebu DT changes for v3.17 (round 4)" from Jason Cooper"
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
* tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add dts definition for Lenovo Iomega ix4-300d NAS
of: Add Lenovo Group Ltd. to the vendor-prefixes list.
ARM: dts: dove: add DT LCD controllers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Broadcom mobile SoCs use a ROM-implemented holding pen for
controlled boot of secondary cores. A special register is
used to communicate to the ROM that a secondary core should
start executing kernel code. This enable method is currently
used for members of the bcm281xx and bcm21664 SoC families.
The use of an enable method also allows the SMP operation vector to
be assigned as a result of device tree content for these SoCs.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
The KVM_CHECK_EXTENSION is only available on the kvm fd today. Unfortunately
on PPC some of the capabilities change depending on the way a VM was created.
So instead we need a way to expose capabilities as VM ioctl, so that we can
see which VM type we're using (HV or PR). To enable this, add the
KVM_CHECK_EXTENSION ioctl to our vm ioctl portfolio.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Unfortunately, the LPCR got defined as a 32-bit register in the
one_reg interface. This is unfortunate because KVM allows userspace
to control the DPFD (default prefetch depth) field, which is in the
upper 32 bits. The result is that DPFD always get set to 0, which
reduces performance in the guest.
We can't just change KVM_REG_PPC_LPCR to be a 64-bit register ID,
since that would break existing userspace binaries. Instead we define
a new KVM_REG_PPC_LPCR_64 id which is 64-bit. Userspace can still use
the old KVM_REG_PPC_LPCR id, but it now only modifies those fields in
the bottom 32 bits that userspace can modify (ILE, TC and AIL).
If userspace uses the new KVM_REG_PPC_LPCR_64 id, it can modify DPFD
as well.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Cc: stable@vger.kernel.org
Signed-off-by: Alexander Graf <agraf@suse.de>
The 440 target hasn't been properly functioning for a few releases and
before I was the only one who fixes a very serious bug that indicates to
me that nobody used it before either.
Furthermore KVM on 440 is slow to the extent of unusable.
We don't have to carry along completely unused code. Remove 440 and give
us one less thing to worry about.
Signed-off-by: Alexander Graf <agraf@suse.de>
This adds code to check that when the KVM_CAP_PPC_ENABLE_HCALL
capability is used to enable or disable in-kernel handling of an
hcall, that the hcall is actually implemented by the kernel.
If not an EINVAL error is returned.
This also checks the default-enabled list of hcalls and prints a
warning if any hcall there is not actually implemented.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This provides a way for userspace controls which sPAPR hcalls get
handled in the kernel. Each hcall can be individually enabled or
disabled for in-kernel handling, except for H_RTAS. The exception
for H_RTAS is because userspace can already control whether
individual RTAS functions are handled in-kernel or not via the
KVM_PPC_RTAS_DEFINE_TOKEN ioctl, and because the numeric value for
H_RTAS is out of the normal sequence of hcall numbers.
Hcalls are enabled or disabled using the KVM_ENABLE_CAP ioctl for the
KVM_CAP_PPC_ENABLE_HCALL capability on the file descriptor for the VM.
The args field of the struct kvm_enable_cap specifies the hcall number
in args[0] and the enable/disable flag in args[1]; 0 means disable
in-kernel handling (so that the hcall will always cause an exit to
userspace) and 1 means enable. Enabling or disabling in-kernel
handling of an hcall is effective across the whole VM.
The ability for KVM_ENABLE_CAP to be used on a VM file descriptor
on PowerPC is new, added by this commit. The KVM_CAP_ENABLE_CAP_VM
capability advertises that this ability exists.
When a VM is created, an initial set of hcalls are enabled for
in-kernel handling. The set that is enabled is the set that have
an in-kernel implementation at this point. Any new hcall
implementations from this point onwards should not be added to the
default set without a good reason.
No distinction is made between real-mode and virtual-mode hcall
implementations; the one setting controls them both.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Merge "Initial support for Rockchip RK3288 SoCs" from Heiko Stuebner:
* tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: Build dtbs for Rockchip boards
ARM: dts: add rk3288 evaluation board
ARM: dts: rockchip: add core rk3288 dtsi
ARM: rockchip: enable support for RK3288 SoCs
ARM: Kconfig: set default gpio number for rockchip SoCs
ARM: rockchip: add debug uart used by rk3288
ARM: rockchip: clarify usability of DEBUG_RK3X_UART debug_ll options
dt-bindings: arm: add cortex-a12 and cortex-a17 cpu compatible properties
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The huge majority of GPIOs have their direction and initial value set
right after being obtained by one of the gpiod_get() functions. The
integer GPIO API had gpio_request_one() that took a convenience flags
parameter allowing to specify an direction and value applied to the
returned GPIO. This feature greatly simplifies client code and ensures
errors are always handled properly.
A similar feature has been requested for the gpiod API. Since setting
the direction of a GPIO is so often the very next action done after
obtaining its descriptor, we prefer to extend the existing functions
instead of introducing new functions that would raise the
number of gpiod getters to 16 (!).
The drawback of this approach is that all gpiod clients need to be
updated. To limit the pain, temporary macros are introduced that allow
gpiod_get*() to be called with or without the extra flags argument. They
will be removed once all consumer code has been updated.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Chanwoo writes:
Update extcon for v3.17
This patchset add new extcon provider driver and fix minor issue of extcon driver.
Detailed description for patchset:
1. Add new Silicon-Mitus SM5502 MUIC (Micro-USB Interface Controller) device
- extcon-sm5502 driver is capable of identifying the type of the external power
source and attached accessory. And external power sources, such as Dedicated
charger or a standard USB port, are able to charge the battery in the smart
phone via the connector.
2. Fix minor issue of extcon driver
- extcon-arizona driver
- extcon-palmas driver
- Remove unnecessary OOM messages for all extcon device drivers
3. Fix minor issue of extcon core
- Re-order the sequence of extcon device driver in Kconfig/Makefile alphabitically
- Set parent device of extcon device automatically using devm_extcon_dev_allocate()
4. Fix MAX77693 driver
- This patchset has dependency on MFD/Regulator/Extcon. So, Lee Jones
(MFD Maintainer) created Immutable branch between MFD and Extcon due
for v3.17 merge-window and then I merged this patchset from MFD git repo[1]
to Extcon git repo.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
(branch: ib-mfd-extcon-regulator)
This patch makes init_net's high_thresh limit to be the maximum for all
namespaces, thus introducing a global memory limit threshold equal to the
sum of the individual high_thresh limits which are capped.
It also introduces some sane minimums for low_thresh as it shouldn't be
able to drop below 0 (or > high_thresh in the unsigned case), and
overall low_thresh should not ever be above high_thresh, so we make the
following relations for a namespace:
init_net:
high_thresh - max(not capped), min(init_net low_thresh)
low_thresh - max(init_net high_thresh), min (0)
all other namespaces:
high_thresh = max(init_net high_thresh), min(namespace's low_thresh)
low_thresh = max(namespace's high_thresh), min(0)
The major issue with having low_thresh > high_thresh is that we'll
schedule eviction but never evict anything and thus rely only on the
timers.
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
merge functionality into the eviction workqueue.
Instead of rebuilding every n seconds, take advantage of the upper
hash chain length limit.
If we hit it, mark table for rebuild and schedule workqueue.
To prevent frequent rebuilds when we're completely overloaded,
don't rebuild more than once every 5 seconds.
ipfrag_secret_interval sysctl is now obsolete and has been marked as
deprecated, it still can be changed so scripts won't be broken but it
won't have any effect. A comment is left above each unused secret_timer
variable to avoid confusion.
Joint work with Nikolay Aleksandrov.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When the high_thresh limit is reached we try to toss the 'oldest'
incomplete fragment queues until memory limits are below the low_thresh
value. This happens in softirq/packet processing context.
This has two drawbacks:
1) processors might evict a queue that was about to be completed
by another cpu, because they will compete wrt. resource usage and
resource reclaim.
2) LRU list maintenance is expensive.
But when constantly overloaded, even the 'least recently used' element is
recent, so removing 'lru' queue first is not 'fairer' than removing any
other fragment queue.
This moves eviction out of the fast path:
When the low threshold is reached, a work queue is scheduled
which then iterates over the table and removes the queues that exceed
the memory limits of the namespace. It sets a new flag called
INET_FRAG_EVICTED on the evicted queues so the proper counters will get
incremented when the queue is forcefully expired.
When the high threshold is reached, no more fragment queues are
created until we're below the limit again.
The LRU list is now unused and will be removed in a followup patch.
Joint work with Nikolay Aleksandrov.
Suggested-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Nikolay Aleksandrov <nikolay@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
With a flash-based BBT there is no reason to move the Factory Bad
Block Marker from the data area buffer (to where it is mapped by the
GPMI NAND controller) to the OOB buffer. Thus, make this feature
configurable via DT. This is required for the Ka-Ro electronics
platforms.
In the original code 'this->swap_block_mark' was synonymous with
'!GPMI_IS_MX23()', so use the latter at the relevant places.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
We don't have license to redistribute this firmware, so extract
it from the driver, and add the needed headers.
Signed-off-by: Matthias Schwarzott <zzam@gentoo.org>
Tested-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The Allwinner A31 and A23 SoCs have a reset controller
maintaining the UART in reset by default.
This patch adds optional reset support to the driver.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Merge "mvebu SoC changes for v3.17 (round 4)" from Jason Cooper:
- Armada XP
- Fix return value check in pmsu code
- Document URLs for new public datasheets (Thanks, Marvell & free-electrons!)
- Armada 370/38x
- Add cpuidle support
- mvebu
- Fix build when no platforms are selected
- Update EBU SoC status in docs
* tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu: (21 commits)
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
ARM: mvebu: make the snoop disabling optional in mvebu_v7_pmsu_idle_prepare()
ARM: mvebu: use a local variable to store the resume address
ARM: mvebu: make the cpuidle initialization more generic
ARM: mvebu: rename the armada_370_xp symbols to mvebu_v7 in pmsu.c
ARM: mvebu: use the common function for Armada 375 SMP workaround
ARM: mvebu: add a common function for the boot address work around
ARM: mvebu: sort the #include of pmsu.c in alphabetic order
ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code
ARM: mvebu: fix return value check in armada_xp_pmsu_cpufreq_init()
clk: mvebu: extend clk-cpu for dynamic frequency scaling
ARM: mvebu: extend PMSU code to support dynamic frequency scaling
...
Conflicts:
arch/arm/mach-mvebu/Kconfig
drivers/cpuidle/cpuidle-armada-370-xp.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As announced parts from ARM they will probably be used in socs shortly.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim:
- support common clock framework for s5pv210 clock
- add generic PHY driver on s5pv210 to support it via DT
- add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards
- remove board files from mach-s5pv210 and unused codes
- enable multiplatform for s5pv210
* tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: samsung: s5pv210: Remove legacy board support
ARM: SAMSUNG: Remove remaining legacy code
gpio: samsung: Remove legacy support of S5PV210
ARM: S5PV210: Enable multi-platform build support
cpufreq: s5pv210: Make the driver multiplatform aware
ARM: S5PV210: Register cpufreq platform device
ARM: S5PV210: move debug-macro.S into the common space
ARM: S5PV210: Untie PM support from legacy code
ARM: S5PV210: Remove support for board files
ARM: dts: Add Device tree for s5pc110/s5pv210 boards
ARM: dts: Add Device tree for s5pv210 SoC
ARM: S5PV210: Add board file for boot using Device Tree
phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver
clk: samsung: Add S5PV210 Audio Subsystem clock driver
ARM: SAMSUNG: Remove legacy clock code
serial: samsung: Remove support for legacy clock code
cpufreq: s3c24xx: Remove some dead code
ARM: S5PV210: Migrate clock handling to Common Clock Framework
clk: samsung: Add clock driver for S5PV210 and compatible SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The following samsung branches are based on these cleanups,
which are already in mainline before this branch gets pulled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The DT binding example in the documentation is missing the -supply
suffix for the vmmc and vqmmc regulators. Fix it.
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This patch introduces a driver that handles configuration of CLKOUT pin
of Exynos SoCs that can be used to output certain clocks from inside of
the SoC to a dedicated output pin.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
qcom clock changes for 3.17
These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
Document the new RDS receiver controls. This will be used by the radio-miropcm20
driver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This patch explicitly documents the relationship between bytesused and data_offset.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This patch adds helper functions to configure clock parents and rates
as specified through 'assigned-clock-parents', 'assigned-clock-rates'
DT properties for a clock provider or clock consumer device.
The helpers are now being called by the bus code for the platform, I2C
and SPI busses, before the driver probing and also in the clock core
after registration of a clock provider.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Introduce a device tree binding document for the MPC512x DMA controller
Signed-off-by: Alexander Popov <a13xp0p0v88@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The "security: introduce kernel_fw_from_file hook" patch defined a
new security hook to evaluate any loaded firmware that wasn't built
into the kernel.
This patch defines ima_fw_from_file(), which is called from the new
security hook, to measure and/or appraise the loaded firmware's
integrity.
Signed-off-by: Mimi Zohar <zohar@linux.vnet.ibm.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Add helper functions that allow regulator consumers to obtain low-level
details about the regulator hardware, like the voltage selector register
address and such. These details can be useful when configuring hardware
or firmware that want to do low-level access to regulators, with no
involvement from the kernel.
The use-case for Tegra is a voltage-controlled oscillator clocksource
which has control logic to change the supply voltage via I2C to achieve
a desired output clock rate.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The Allwinner A31 DMA controller is rather simple to describe in the DT. Add
the bindings documentation.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Make /sys/bus/rbd/devices/<id>/parent show the entire chain of parent
images. While at it, kernel sprintf() doesn't return negative values,
casting to unsigned long long is no longer necessary and there is no
good reason to split into multiple sprintf() calls.
Signed-off-by: Ilya Dryomov <ilya.dryomov@inktank.com>
Reviewed-by: Alex Elder <elder@linaro.org>
