Add handling for gta04 tv out chain:
venc -> opa362 -> svideo
Use invert-polarity in venc node because opa362
is doing polarity inversion also.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to
GPMC bus.
Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for
all three modules.
NAND timings are calculated to be safe for CM-T3x devices as it works
now in non DT boot (in this case the timings are updated by U-Boot).
Update GPMC ranges in boards DT files to include all connected devices.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Add device tree node for the Secure Non-Volatile Storage
(SNVS) on the VF610 platform. The SNVS block also has a
Real Time Counter (RTC).
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
I made a mistake when rebasing Andrey Gusakov's patch adding MLB+ clock to the
R8A7791 device tree, inserting <&hp_clk> into the "clocks" property of the
MSTP8 node at a wrong position, so that the input clocks for MLB+ and IPMMU-SGX
got swapped...
Fixes: 7408d3061d ("ARM: shmobile: r8a7791: add MLB+ clock")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a device node for the System Controller, with subnodes that
represent the hardware power area hierarchy.
Hook up all devices to their respective PM domains.
Add a minimal device node for the Coresight-ETM hardware block, and hook
it up to the D4 PM domain, so the R-Mobile System Controller driver can
keep the domain powered, until the new Coresight code handles runtime
PM.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Renesas sound driver needs #sound-dai-cells settings, but, this usage
is a little bit confusable. It came from ALSA SoC historical reasons.
The sound DAI naming method is different between Single/Multi DAI in
the ALSA framework, and it is used for sound card matching.
And this #sound-dai-cells has relationship to it.
Current SoC dtsi has #sound-dai-cells = <1> as default settings
(= it is assuming that board/platform has multi DAI), and
board/platform side needs to overwrite it if board/platform was single
DAI. This style is more confusable for users.
This patch removes SoC side default settings, and force to set it by
board/platform side.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Renesas sound driver needs #sound-dai-cells settings, but, this usage
is a little bit confusable. It came from ALSA SoC historical reasons.
The sound DAI naming method is different between Single/Multi DAI in
the ALSA framework, and it is used for sound card matching.
And this #sound-dai-cells has relationship to it.
Current SoC dtsi has #sound-dai-cells = <1> as default settings
(= it is assuming that board/platform has multi DAI), and
board/platform side needs to overwrite it if board/platform was single
DAI. This style is more confusable for users.
This patch removes SoC side default settings, and force to set it by
board/platform side.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Merge "ARM: berlin: DT changes for v3.20 (round 1)" from Sebastian Hesselbarth:
Berlin DT changes for v3.20 (round 1)
- add PMU nodes for BG2Q and BG2CD
- add PPI CPU masks for TWD timer interrupts
* tag 'berlin-dt-for-3.20-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: add PPI cpu mask to twd timer interrupts
ARM: dts: berlin: add pmu node for BG2Q and BG2CD
Signed-off-by: Olof Johansson <olof@lixom.net>
A number of arches (EXYNOS/IMX/TEGRA) are separated out into finer grained
definitions whether it be sub ARCH or SOC definitions. The device tree blobs
should only be built if the specific option is enabled that supports that
device or it might be that there's an expectation that the device is supported
when in actual fact it's not. This ensures only the relevant bits are built.
Also standardised the line break between the arch/soc definitions and the
dtbs to be on separate lines for better consistency as per feedback.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
[olof: Fixed stray \ in one of the IMX rules]
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Renesas ARM Based SoC Lager Board Removal for v3.20" from Simon Horman:
"The serial port rename changes are not strictly related to lager board
removal from a feature point of view. But the lager portion of this change
depends on board removal to avoid a regression of booting using that code,
And thus it seems to make sense to put here. And it seems best to put the
koelsch and lager serial port rename changes in the same branch.
Likewise the removal of bootargs from lager DT depends on removing lager
board code to avoid a regression when using it and thus I have included
it in the same branch."
* Remove legacy r8a7790 SoC and its Lager board code
* Update serial port names on koelsch and lager boards
* Remove console bootargs parameter from lager DT
* tag 'renesas-lager-board-removal-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: lager dts: Drop console= bootargs parameter
ARM: shmobile: koelsch: Rename SCIF[01] serial ports to ttySC[01]
ARM: shmobile: lager: Rename SCIFA[01] serial ports to ttySC[01]
ARM: shmobile: r8a7790: Remove legacy code
ARM: shmobile: lager: Remove legacy board support
ARM: shmobile: lager-reference: DTS-only board support
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Renesas ARM Based SoC DT Updates for v3.20" from Simon Horman:
* Use clock-indices instead of deprecated renesas,clock-indices
* Prepare for r8a73a4 multiplatform support
* Increase clock coverage for r8a779[014]
* Correct r8a7779 clock usage
* Correct LAN9220 VDDVARIO voltage on ape6evm
* Correct QSPI SPI-Flash mode of lager and koelsch
* Correct flash partition label and size on koelsch
* Correct mask for GIC PPI interrupts on r8a779[14]
* Correct BSC bus range on ape6evm-reference
* tag 'renesas-dt-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
ARM: shmobile: r8a7791: add MLB+ clock
ARM: shmobile: r8a7790: add MLB+ clock
ARM: shmobile: ape6evm: Fix LAN9220 VDDVARIO voltage
ARM: shmobile: r8a73a4: Add r8a73a4-ape6evm.dtb to ARCH_SHMOBILE_MULTI
ARM: shmobile: ape6evm: Add keypad to the device tree
ARM: shmobile: ape6evm: Add LEDs to the device tree
ARM: shmobile: ape6evm: synchronize dts with reference platform
ARM: shmobile: ape6evm: fix compatible string for Ethernet controller
ARM: shmobile: r8a7794: Add MMCIF clock to device tree
ARM: shmobile: r8a7794: Add SDHI clocks to device tree
ARM: shmobile: r8a7794: Add I2C clocks to device tree
ARM: shmobile: r8a7779: Add TWD device to DTS
ARM: shmobile: r8a7779: Use MSTP for SCIF clocks
ARM: shmobile: r8a7779: Use R8A7779_CLK_P as SCIF parent clock
ARM: shmobile: r8a7794: Add QSPI clock to device tree
ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree
ARM: shmobile: koelsch: Fix QSPI mode of SPI-Flash into mode3
ARM: shmobile: r8a7794: Add USBDMAC[01] clocks to device tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "Renesas ARM Based SoC DT Cleanups for v3.20" from Simon Horman:
* Replace status value "ok" with "okay"
* tag 'renesas-dt-cleanups-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference dts: Replace status value "ok" by "okay"
ARM: shmobile: alt dts: Replace status value "ok" by "okay"
ARM: shmobile: koelsch dts: Replace status value "ok" by "okay"
ARM: shmobile: henninger dts: Replace status value "ok" by "okay"
ARM: shmobile: lager dts: Replace status value "ok" by "okay"
ARM: shmobile: armadillo800eva dts: Replace status value "ok" by "okay"
ARM: shmobile: genmai dts: Replace status value "ok" by "okay"
Signed-off-by: Olof Johansson <olof@lixom.net>
atmel_lcdfb needs also uses hclk clock, but AT91SAM9263 doesn't have that
specific clock, so use lcd_clk twice. The same was done in
arch/arm/mach-at91/at91sam9263.c
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch adds MIPI-DSI and MIPI-DSI based S6E63J0X03 AMOLED panel
device nodes for Exynos3250 Rinato board.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds device tree node for hsotg to control USB 2.0 Device.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch enables hsotg and usbphy node to use USB 2.0 Device.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds device tree node for hsotg to control USB 2.0 Device.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch adds device tree node for exynos_usbphy to use USB 2.0 Device.
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is
kept the same as the vendors naming, which means it's prefixed with
exynos5422 instead of exynos5800 as the SoC name even though it
includes the exyno5800 dtsi.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
we should not be mixing address spaces in the reg property like this driver
currently does. This patch updates the driver, dt docs and also the existing
dt nodes to pass the sysconfig offset in the syscon dt property.
This patch breaks DT compatibility! But this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds the DT nodes for the extra ehci and ohci usb controllers
on the stih410 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds the dt nodes for the extra usb2 picophys found on
the stih410.
These two picophys are used in conjunction with the extra ehci/ohci usb
controllers also found on the stih410 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds the dt nodes for the usb2 picophy found on the stih407
device family. It is used on stih407 by the dwc3 usb3 controller when
controlling usb2/1.1 devices.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the miphy365 phy driver to access sysconfig register offsets via
syscfg dt property.
This is because the reg property should not be mixing address spaces
like it does currently for miphy365. This change then also aligns us
to how other platforms such as keystone and bcm7445 pass there syscon
offsets via DT.
This patch breaks DT compatibility, but this platform is considered WIP,
and is only used by a few developers who are upstreaming support for it.
This change has been done as a single atomic commit to ensure it is
bisectable.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
MARCO will not be supported any more. it has been replaced by CSR
atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Due to the special handling of window 13 on Armada 375 and Armada 38x
(similar to Armada XP), the MBus hardware block is *not* compatible
with the one used on Armada 370. Using the Armada 370 compatible
string on Armada 375 and 38x will lead to a non-working device if
window 13 ends up being used.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
The A388-GP is a board produced by Marvell that holds
- 1 PCIe slot
- 2 mini PCIe slot (one of them is multiplexed with the PCIe slot,
muxing is selected through the GPIO expander)
- 1 16MB SPI-NOR
- 2 Gigabit Ethernet ports
- 4 SATA ports (2 of them are multiplexed with the mini PCIe slots,
muxing is selected through the GPIO expander)
- 1 SDIO slot
- 1 USB3 port
- 2 USB2 port
- 2 GPIO/interrupts expander on I2C
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
This SoC belongs to the Armada 38x family. The main difference with
the Armada 385 is that the 388 can handle two more SATA
ports. Currently the consequence is the use of a different compatible
string for the pinctrl node, in order to be able to use the pins
associated to this 2 new SATA ports. The second SATA controller has
also been moved from the armada38x.dtsi as it it specific to the
Armada388 version.
In the same time the Armada385 DB and Armada 385 RD board have been
renamed in the 388 one and now include the armada-388.dtsi file. AS
both of them have 4 SATA ports the SoC used on them were wrongly
described.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
The pintcrl label was missing. Adding it allowed referring it from the
root of the device tree. Also add the uart0 label used by the
bootloader.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
With the Armada 385 GP board more pinctrl functions depending of the
SoC are needed. Add them to the DTSI to avoid duplication.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB
SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage.
[gregory.clement@free-electrons.com: switch the license to the dual
X11/GPL with the agreement of the author]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
This patch adds the DT nodes for the extra ehci and ohci usb controllers
on the stih410 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the dt nodes for the extra usb2 picophys found on
the stih410.
These two picophys are used in conjunction with the extra ehci/ohci usb
controllers also found on the stih410 SoC.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
