This patch adds the dt nodes for the usb2 picophy found on the stih407
device family. It is used on stih407 by the dwc3 usb3 controller when
controlling usb2/1.1 devices.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
"isil" and "isl" prefixes are used at various locations inside the kernel
to reference Intersil corporation. This patch is part of a series fixing
those locations were "isl" is used in compatible strings to use the now
expected "isil" prefix instead (NASDAQ symbol for Intersil and most used
version).
Note: isl29028 is an I2C device so the patch does not in fact currently
depend on the introduction of "isil"-based compatible string in isl29028
driver because I2C core does not check the prefix yet.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.
Signed-off-by: Thierry Reding <treding@nvidia.com>
As 456062b3ec ("ARM: imx: add FEC sleep mode callback function") has been
reverted, also revert the dts part.
This reverts commit 07b4d2dda0 ("ARM: dts: imx6qdl: enable FEC
magic-packet feature").
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add sysirq node to mt6592.dtsi and also correct timer interrupt flag.
The old setting works because boot loader already set it.
With a sysirq device node, the timer interrupt can use a correct value.
Signed-off-by: Howard Chen <howard.chen@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch enable UART for MT8127 moose board and MT8135 evalution board.
Adding the dts, these two boards can show log and shell prompts.
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
TPS gpio now controls a 5v 500mA TL5209 regulator which may be supply
a fan (such as AFB02505HHB) over J1 connector for various purposes.
Provide device tree node to enable the same.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM437x IDK board has a User Switch which we can
program to whatever we want. Because this board
doesn't have a PMIC which can give us power button
presses, let's use this user switch as a gpio-keys
power button.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add twl_power for N950/N9. Start with the simplest configuration to just
enable power off.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let this board report KEY_POWER so upper layers
can decide what to do when power button is pressed.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AM437x Industrial Development Kit (IDK) is
an application development platform targeted at
industrial communication and control applications.
It comes with a 3-phase motor driver, PROFINET,
PROFIBUS and a few other industrial communication
interfaces.
The board has 1GiB of DDR3 RAM, QSPI NOR flash,
a 100% discrete power design (no PMIC) and an
on-board 2MP camera (not supported with Linux
as of this writing).
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device tree nodes and pinmux entries for Video Processing
Front End (VPFE) on am437x gp evm.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device tree nodes and pinmux entries for Video Processing
Front End (VPFE) on am437x sk evm.
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device tree nodes and pinmux entries for Video Processing
Front End (VPFE) on am43x epos evm.
Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since phyid is no longer used by pcie driver, this field can be dropped
from the DT.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This fixes english in comments and removes extra empty newline.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CPSW DT binding to beagle X15 DTS in order to
get ethernet working with this board.
Note that we're also adding sleep state which will
place all pins in mux mode 15 - which means "driver
off" - thus conserving power.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSS data lines don't need pulls, it's best
to remove them to guarantee signal integrity.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM437x Starter Kit already has discrete pullups
for all I2C buses, so we can (and should) remove
internal pulls.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch just makes USB[01]_DRVVBUS signal
explicitly muxed. Note that board already has
a discrete pulldown, so we're not adding any
pulls here.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM437x Starter Kit already has discrete pulls
where they are necessary. It's safe (and actually
better) to remove internal pulls.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
By don't relying on implicit MMC0 pulldown we
make sure that pins are marked busy and even
if we have a broken bootloader, MMC0 will
remain functional.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
QSPI doesn't need any pullups of any sort,
let's remove them.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 58ecb23f64 ("ARM: tegra: add missing unit addresses to DT") added
unit address and changed reg base for GR3D and DSI host1x modules, but these
addresses belongs to GR2D and TVO modules respectively. Fix it by changing
modules unit and reg base addresses to proper ones.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Fixes: 58ecb23f64 (ARM: tegra: add missing unit addresses to DT)
Cc: <stable@vger.kernel.org> # v3.13+
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The gpio4 and gpio5 are in 0xf7fc0000 apb which is located in the SM domain.
This patch moves gpio4 and gpio5 to the correct location. This patch also
renames them as the following to match the names we internally used in
marvell:
gpio4 -> sm_gpio1
gpio5 -> sm_gpio0
porte -> portf
portf -> porte
This also matches what we did for BG2 and BG2CD's SM GPIO.
Cc: stable@vger.kernel.org # 3.16+
Fixes: cedf57fc4f ("ARM: dts: berlin: add the BG2Q GPIO nodes")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
According to the gic binding document, "bits[15:8] PPI interrupt cpu
mask. Each bit corresponds to each of the 8 possible cpus attached to
the GIC. A bit set to '1' indicated the interrupt is wired to that
CPU." This patch wants to add the PPI cpu mask for completeness.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
BG2CD SoCs.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
There's no card detection for the eMMC, so this patch adds the missing
broken-cd property. This patch also sets bus width as 8 to add
MMC_CAP_8_BIT_DATA in the Host capabilities.
Cc: stable@vger.kernel.org # 3.16+
Fixes: 3047086dfd ("ARM: dts: berlin: enable SD card reader and eMMC for the BG2Q DMP")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work without this patch due to the "core" clk is gated.
Cc: stable@vger.kernel.org # 3.16+
Fixes: 0d859a6a9d ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q")
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Revert "ARM: dts: Disable smc91x on n900 until bootloader
dependency is removed". We've now fixed the issues that
caused problems with uninitialized hardware depending on
the bootloader version. Mostly things got fixed with
the following commits:
9a894953a9 ("ARM: dts: Fix bootloader version dependencies by muxing n900 smc91x pins")
7d2911c438 ("net: smc91x: Fix gpios for device tree based booting")
Note that this only affects the early development boards
with Ethernet that we still have in a few automated boot
test systems. And it's also available supposedly in some
versions of qemu.
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO2_5 is the reset GPIO for the USB3317 ULPI PHY. Instead of modelling it as
a regulator, the correct approach is to use the 'reset_gpios' property of the
"usb-nop-xceiv" node.
GPIO1_7 is the reset GPIO for the USB2517 USB hub. As we currently don't have
dt bindings to describe a HUB reset, let's keep using the regulator approach.
Rename the regulator to 'reg_hub_reset' to better describe its function and bind
it with the USB host1 port instead.
USB host support has been introduced by commit 9bf206a9d1 ("ARM: dts:
imx51-babbage: Add USB Host1 support"), which landed in 3.16 and it seems that
USB has only been functional due to previous bootloader initialization.
With this patch applied we can get USB host to work without relying on the
bootloader.
Cc: <stable@vger.kernel.org> # 3.16+
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Enables the gpio-base mic detection on the Acer Chromebook 13. This
gpio is set by the jack-detection chip when it notices either of the
TRRS type headsets with a microphone.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Ippo q8h has its serial console connected to the r-uart. Adjust the
serial0 alias to match.
This fixes the kernel serial console no longer working since 3.19-rc1, because
8250_dw.c now honors dt aliases, causing the serial console to be ttyS5 rather
then being ttyS0, as it was in 3.18 and before.
Note that adjusting bootargs instead is not an acceptable fix, because
console=ttyS0,115200 is used by a lot of bootscripts, etc. and this should
continue to work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
64KiB is allocated for qspi dtb partition which is not
sufficient, so updating the partition table size to 512KiB
for device tree partition.
This also aligns the QSPI partition definitions between
kernel and U-Boot.
Fixes: dc2dd5b8 ("ARM: dts: dra7: Add qspi device")
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds support for Seagate BlackArmor NAS220.
The Seagate BlackArmor NAS 220 is a NAS system based on Marvell 88f6192. It has
32MB NAND and 128MB DRAM. It has two SATA slots, one Gigabit Ethernet port, two
USB 2.0 ports, two buttons and three LEDs. There is a serial port available on
the CN5 connector on the board (1 - TX, 4 - RX, 6 - GND).
The only functionality still not implemented is the bi-color led on the front
panel (status). Pins mpp22 and mpp23 control this led. Setting mpp22 to high and
mpp23 to low results in orange color. Setting mpp22 to low and mpp23 to high
results in blue color.
The third led is wired to show the SATA activity on the two drives.
Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Add basic i.MX6SoloX Sabre Auto board support, currently
only debug UART and uSDHC are supported on this board.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to Documentation/devicetree/bindings/media/coda.txt:
- clock-names : Should be "ahb", "per"
The OCRAM clock is already provided inside the ocram node, so remove the OCRAM
clock from the VPU node.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Currently the cpufreq volt/freq table we used is
for LDO enable mode, according to latest datasheet
Rev. 3, 03/2014, the volt/freq table is as below:
LDO enabled(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;
LDO bypassed(min value):
996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;
Adding 25mV to cover board IR drop, for LDO enabled
mode of 996MHz, VDDARM should be 1.250V, so this
patch updates it.
Signed-off-by: Anson Huang <b20788@freescale.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
According to latest i.MX6Q datasheet Rev. 3, 02/2014,
the latest cpufreq volt/freq table is as below:
LDO enabled/bypassed(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 0.925V, VDDSOC: 1.150V;
the 792MHz setpoint's VDDARM min voltage is updated
from 1.125V to 1.150V, adding 25mV to cover board IR
drop, 1.175V is the right voltage we should use.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
