Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use
of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()"
* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
dt-bindings: timer: Add fsl,vf610-pit.yaml
dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
dt-bindings: arm/cpus: Allow 2 power-domains entries
dt-bindings: usb: dwc3-xilinx: allow dma-coherent
media: dt-bindings: sony,imx219: Allow props from video-interface-devices
dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
dt-bindings: trivial-devices: Add VZ89TE to trivial
media: dt-bindings: renesas,vsp1: add top-level constraints
media: dt-bindings: renesas,fcp: add top-level constraints
dt-bindings: trivial-devices: Add Maxim max30208
dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
...
Pull irq controller updates from Thomas Gleixner:
"Update for interrupt chip drivers:
- Convert the generic interrupt chip to lock guards to remove copy &
pasta boilerplate code and gotos.
- A new driver fot the interrupt controller in the EcoNet EN751221
MIPS SoC.
- Extend the SG2042-MSI driver to support the new SG2044 SoC
- Updates and cleanups for the (ancient) VT8500 driver
- Improve the scalability of the ARM GICV4.1 ITS driver by utilizing
node local copies a VM's interrupt translation table when possible.
This results in a 12% reduction of VM IPI latency in certain
workloads.
- The usual cleanups and improvements all over the place"
* tag 'irq-drivers-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
irqchip/irq-pruss-intc: Simplify chained interrupt handler setup
irqchip/gic-v4.1: Use local 4_1 ITS to generate VSGI
irqchip/econet-en751221: Switch to of_fwnode_handle()
irqchip/irq-vt8500: Switch to irq_domain_create_*()
irqchip/econet-en751221: Switch to irq_domain_create_linear()
irqchip/irq-vt8500: Use fewer global variables and add error handling
irqchip/irq-vt8500: Use a dedicated chained handler function
irqchip/irq-vt8500: Don't require 8 interrupts from a chained controller
irqchip/irq-vt8500: Drop redundant copy of the device node pointer
irqchip/irq-vt8500: Split up ack/mask functions
irqchip/sg2042-msi: Fix wrong type cast in sg2044_msi_irq_ack()
irqchip/sg2042-msi: Add the Sophgo SG2044 MSI interrupt controller
irqchip/sg2042-msi: Introduce configurable chipinfo for SG2042
irqchip/sg2042-msi: Rename functions and data structures to be SG2042 agnostic
dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controller
genirq/generic-chip: Fix incorrect lock guard conversions
genirq/generic-chip: Remove unused lock wrappers
irqchip: Convert generic irqchip locking to guards
gpio: mvebu: Convert generic irqchip locking to guard()
ARM: orion/gpio:: Convert generic irqchip locking to guard()
...
Convert the TI OMAP2/3 interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
"ti,intc-size" property isn't actually used with "ti,omap2-intc", so the
2 bindings can be combined.
Link: https://lore.kernel.org/r/20250505144917.1294150-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TI-NSPIRE interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
'#interrupt-cells' was missing from the property list, but used in the
example, so add it.
Link: https://lore.kernel.org/r/20250505144711.1289677-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Broadcom BCM6345 interrupt controller binding to schema
format.
The old schema indicated SoC specific compatibles should be present, but
there are none in use. So drop them.
The most number of CPUs on any platform seems to be 2, so document that
as the maximum.
Link: https://lore.kernel.org/r/20250505144622.1287712-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Amazaon Alpine MSIX controller binding to schema format.
Drop the interrupt-controller property as the MSIX controller doesn't
provide interrupts. The interrupt-parent property is required in this
case for custom MSI mapping properties.
Link: https://lore.kernel.org/r/20250505144543.1286351-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Open PIC interrupt controller binding to schema format.
While the Linux kernel supports the "open-pic" compatible, that's not
used in any upstream .dts file. It used for "device_type" though. Add
"fsl,mpic" compatible which was not documented.
Link: https://lore.kernel.org/r/20250505144809.1291619-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Device tree bindings updates for v6.16-rc1
Convert the legacy interrupt controller (LIC) and APBDMA controller
device tree bindings from freeform text to dt-schema.
Document the ASUS Transformer Pad TF300TL compatible string and add
missing compatible strings for newer generations of the Tegra CEC.
* tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
media: dt-bindings: Document Tegra186 and Tegra194 cec
dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL
dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers
dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema
dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema
Link: https://lore.kernel.org/r/20250509212604.2849901-1-treding@nvidia.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert the OpenRISC OMPIC interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Convert the OpenRISC PIC interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
