Commit Graph

7489 Commits

Author SHA1 Message Date
Hardevsinh Palaniya
f3a59ab98c spi: spi-imx: Fix casting warnings
Sparse warnings:

drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:410:19: warning: cast to restricted __be32
drivers/spi/spi-imx.c:439:21: warning: incorrect type in assignment (different base types)
drivers/spi/spi-imx.c:439:21:    expected unsigned int [addressable] [usertype] val
drivers/spi/spi-imx.c:439:21:    got restricted __be32 [usertype]

Signed-off-by: Hardevsinh Palaniya <hardevsinh.palaniya@siliconsignals.io>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20241008055644.4900-3-hardevsinh.palaniya@siliconsignals.io
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-08 18:17:33 +01:00
Hardevsinh Palaniya
66c1c4175b spi: spi-fsl-dspi: Fix casting warnings
Sparse warnings:

drivers/spi/spi-fsl-dspi.c:283:17: warning: incorrect type in assignment (different base types)
drivers/spi/spi-fsl-dspi.c:283:17:    expected unsigned int [usertype]
drivers/spi/spi-fsl-dspi.c:283:17:    got restricted __be32 [usertype]
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:289:28: warning: cast to restricted __be32
drivers/spi/spi-fsl-dspi.c:295:17: warning: incorrect type in assignment (different base types)
drivers/spi/spi-fsl-dspi.c:295:17:    expected unsigned int [usertype]
drivers/spi/spi-fsl-dspi.c:295:17:    got restricted __be16 [usertype]
drivers/spi/spi-fsl-dspi.c:301:28: warning: cast to restricted __be16
drivers/spi/spi-fsl-dspi.c:301:28: warning: cast to restricted __be16
drivers/spi/spi-fsl-dspi.c:301:28: warning: cast to restricted __be16
drivers/spi/spi-fsl-dspi.c:301:28: warning: cast to restricted __be16

Signed-off-by: Hardevsinh Palaniya <hardevsinh.palaniya@siliconsignals.io>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://patch.msgid.link/20241008055644.4900-2-hardevsinh.palaniya@siliconsignals.io
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-08 18:17:32 +01:00
Mark Brown
c2a59c892f spi: Merge up v6.12
Fixes build issues with the KVM selftests.
2024-10-07 14:53:15 +01:00
Linus Torvalds
60b9f47eb3 Merge tag 'spi-fix-v6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
 "A small set of driver specific fixes that came in since the merge
  window, about half of which is fixes for correctness in the use of the
  runtime PM APIs done as part of a broader cleanup"

* tag 'spi-fix-v6.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: s3c64xx: fix timeout counters in flush_fifo
  spi: atmel-quadspi: Fix wrong register value written to MR
  spi: spi-cadence: Fix missing spi_controller_is_target() check
  spi: spi-cadence: Fix pm_runtime_set_suspended() with runtime pm enabled
  spi: spi-imx: Fix pm_runtime_set_suspended() with runtime pm enabled
2024-10-05 10:25:04 -07:00
Uwe Kleine-König
eb6c65049a spi: Provide defer reason if getting irq during probe fails
Using dev_err_probe() in spi_probe() improves the kernel output from

	spi spi0.0: deferred probe pending: (reason unknown)

to

	spi spi0.0: deferred probe pending: ad7124: Failed to get irq...

for my current quest to make a certain spi device work.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20241004094234.268301-2-u.kleine-koenig@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-04 13:04:05 +01:00
Al Viro
5f60d5f6bb move asm/unaligned.h to linux/unaligned.h
asm/unaligned.h is always an include of asm-generic/unaligned.h;
might as well move that thing to linux/unaligned.h and include
that - there's nothing arch-specific in that header.

auto-generated by the following:

for i in `git grep -l -w asm/unaligned.h`; do
	sed -i -e "s/asm\/unaligned.h/linux\/unaligned.h/" $i
done
for i in `git grep -l -w asm-generic/unaligned.h`; do
	sed -i -e "s/asm-generic\/unaligned.h/linux\/unaligned.h/" $i
done
git mv include/asm-generic/unaligned.h include/linux/unaligned.h
git mv tools/include/asm-generic/unaligned.h tools/include/linux/unaligned.h
sed -i -e "/unaligned.h/d" include/asm-generic/Kbuild
sed -i -e "s/__ASM_GENERIC/__LINUX/" include/linux/unaligned.h tools/include/linux/unaligned.h
2024-10-02 17:23:23 -04:00
Colin Ian King
46854574fd spi: spi-ti-qspi: remove redundant assignment to variable ret
Variable ret is being assigned a value but it is never read, instead
the variable is being reassigned later in the exit path via label
no_dma. Remove the redundant assignment.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://patch.msgid.link/20241002162652.957102-1-colin.i.king@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-02 19:33:04 +01:00
Mark Brown
65fbec3121 spi: Fix pm_runtime_set_suspended() with runtime pm
Merge series from Jinjie Ruan <ruanjinjie@huawei.com>:

Fix pm_runtime_set_suspended() with runtime pm enabled, and fix the missing
check for spi-cadence.

Jinjie Ruan (3):
  spi: spi-imx: Fix pm_runtime_set_suspended() with runtime pm enabled
  spi: spi-cadence: Fix pm_runtime_set_suspended() with runtime pm
    enabled
  spi: spi-cadence: Fix missing spi_controller_is_target() check

 drivers/spi/spi-cadence.c | 8 +++++---
 drivers/spi/spi-imx.c     | 2 +-
 2 files changed, 6 insertions(+), 4 deletions(-)

--
2.34.1
2024-10-02 00:24:48 +01:00
Ben Dooks
68a16708d2 spi: s3c64xx: fix timeout counters in flush_fifo
In the s3c64xx_flush_fifo() code, the loops counter is post-decremented
in the do { } while(test && loops--) condition. This means the loops is
left at the unsigned equivalent of -1 if the loop times out. The test
after will never pass as if tests for loops == 0.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Fixes: 230d42d422 ("spi: Add s3c64xx SPI Controller driver")
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://patch.msgid.link/20240924134009.116247-2-ben.dooks@codethink.co.uk
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-01 19:02:01 +01:00
Mark Brown
e8d2b5bd60 spi: spi-fsl-lpspi: Some calculation improvements
Merge series from Stefan Wahren <wahrenst@gmx.net>:

This series contains some improvements for spi-fsl-lpspi which are
related to the calculations within fsl_lpspi_set_bitrate.
2024-10-01 12:16:13 +01:00
Alexander Dahl
162d9b5d23 spi: atmel-quadspi: Fix wrong register value written to MR
aq->mr should go to MR, nothing else.

Fixes: 329ca3eed4 ("spi: atmel-quadspi: Avoid overwriting delay register settings")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/linux-spi/20240926-macarena-wincing-7c4995487a29@thorsis.com/T/#u
Link: https://patch.msgid.link/20240926090356.105789-1-ada@thorsis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-10-01 12:07:53 +01:00
Mark Brown
356749a2b2 Improve error handling in Rockchip SPI drivers
Merge series from Dragan Simic <dsimic@manjaro.org>:

This is a small series that improves error handling in the probe path
of the Rockchip SPI drivers, by using dev_err_probe() properly in multiple
places.  It also performs a bunch of small, rather trivial code
cleanups, to make the code neater and a bit easier to read.
2024-09-30 22:44:35 +01:00
Mark Brown
9e3dfbcf70 spi: replace and remove
Merge series from Yang Yingliang <yangyingliang@huaweicloud.com>:

Switch to use {devm_}spi_alloc_host/target() in drivers and remove
{devm_}spi_alloc_master/slave() in spi driver.
2024-09-30 22:43:40 +01:00
Mark Brown
b45938ed36 spi: spi_amd: Performance Optimization Patch Series
Merge series from Raju Rangoju <Raju.Rangoju@amd.com>:

AMD SPI controller’s index mode performance is constrained by the
hardware limitation of the FIFO queue length. This patch series introduces
optimizations to the spi_amd driver, aiming to maximize throughput and
enhance overall performance. The changes includes,

- Enable SPI dual and quad I/O modes and update SPI-MEM support function to
reflect AMD SPI0 hardware capabilities.
- Utilize efficient kernel APIs to streamline SPI I/O operations for
enhanced performance.
- Refine the set tx/rx count functions to optimize SPI I/O throughput.
- Minimize the number of data read calls by efficiently retrieving data
from FIFO queues, improving SPI I/O efficiency.
- Add changes to support AMD HID2 SPI controller and update SPI-MEM support
function to reflect AMD HID2 hardware capabilities.
- Add changes to set SPI controller address mode before initiating the
commands
- Add changes to implement HIDDMA read operation support for HID2 SPI
controller
2024-09-30 22:43:34 +01:00
Stefan Wahren
667b5e803a spi: spi-fsl-lpspi: support effective_speed_hz
Setting spi_transfer->effective_speed_hz in transfer_one so that
SPI client driver can use it.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20240930093056.93418-4-wahrenst@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 22:31:40 +01:00
Stefan Wahren
7086f49dc4 spi: spi-fsl-lpspi: Fix specifiers in fsl_lpspi_set_bitrate
Most of the parameters are unsigned, so fix the used format
specifiers in the debug message in fsl_lpspi_set_bitrate.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20240930093056.93418-3-wahrenst@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 22:31:40 +01:00
Stefan Wahren
fa8ecda987 spi: spi-fsl-lpspi: Adjust type of scldiv
The target value of scldiv is just a byte, but its calculation in
fsl_lpspi_set_bitrate could be negative. So use an adequate type to store
the result and avoid overflows. After that this needs range check
adjustments, but this should make the code less opaque.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20240930093056.93418-2-wahrenst@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 22:31:39 +01:00
Jinjie Ruan
3eae4a916f spi: spi-cadence: Fix missing spi_controller_is_target() check
The spi_controller_is_target() check is missing for pm_runtime_disable()
in cdns_spi_remove(), add it.

Fixes: b1b90514ea ("spi: spi-cadence: Add support for Slave mode")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240923040015.3009329-4-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 21:55:00 +01:00
Jinjie Ruan
67d4a70faa spi: spi-cadence: Fix pm_runtime_set_suspended() with runtime pm enabled
It is not valid to call pm_runtime_set_suspended() for devices
with runtime PM enabled because it returns -EAGAIN if it is enabled
already and working. So, call pm_runtime_disable() before to fix it.

Fixes: d36ccd9f7e ("spi: cadence: Runtime pm adaptation")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240923040015.3009329-3-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 21:55:00 +01:00
Jinjie Ruan
b6e05ba084 spi: spi-imx: Fix pm_runtime_set_suspended() with runtime pm enabled
It is not valid to call pm_runtime_set_suspended() for devices
with runtime PM enabled because it returns -EAGAIN if it is enabled
already and working. So, call pm_runtime_disable() before to fix it.

Fixes: 43b6bf406c ("spi: imx: fix runtime pm support for !CONFIG_PM")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240923040015.3009329-2-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 21:54:59 +01:00
Alexander Dahl
625de1881b spi: atmel-quadspi: Add cs_hold and cs_inactive setting support
spi-cs-inactive-delay-ns in dts is cs_inactive in spi core, and it maps
to DLYCS (Minimum Inactive QCS Delay) in QSPI Mode Register (QSPI_MR).

spi-cs-hold-delay-ns in dts is cs_hold in spi core, and it maps to
DLYBCT (Delay Between Consecutive Transfers) in QSPI_MR.  That one can
be set to other values than 0 only if the chip is not in Serial Memory
Mode (SMM), it must be written to '0' however when in SMM.

Tested on SAM9X60 based board with FPGA implementing custom SPI Memory
protocol.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://patch.msgid.link/20240918082744.379610-3-ada@thorsis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:26 +02:00
Lorenzo Bianconi
7a4b3ebf1d spi: airoha: do not keep {tx,rx} dma buffer always mapped
DMA map txrx_buf on demand in airoha_snand_dirmap_read and
airoha_snand_dirmap_write routines and do not keep it always mapped.
This patch is not fixing any bug or introducing any functional change
to the driver, it just simplifies the code and improve code readability
without introducing any performance degradation according to the results
obtained from the mtd_speedtest kernel module test.

root@OpenWrt:# insmod mtd_test.ko
root@OpenWrt:# insmod mtd_speedtest.ko dev=5
[   49.849869] =================================================
[   49.855659] mtd_speedtest: MTD device: 5
[   49.859583] mtd_speedtest: MTD device size 8388608, eraseblock size 131072, page size 2048, count of eraseblocks 64, pages per eraseblock 64, OOB size 128
[   49.874622] mtd_test: scanning for bad eraseblocks
[   49.879433] mtd_test: scanned 64 eraseblocks, 0 are bad
[   50.106372] mtd_speedtest: testing eraseblock write speed
[   53.083380] mtd_speedtest: eraseblock write speed is 2756 KiB/s
[   53.089322] mtd_speedtest: testing eraseblock read speed
[   54.143360] mtd_speedtest: eraseblock read speed is 7811 KiB/s
[   54.370365] mtd_speedtest: testing page write speed
[   57.349480] mtd_speedtest: page write speed is 2754 KiB/s
[   57.354895] mtd_speedtest: testing page read speed
[   58.410431] mtd_speedtest: page read speed is 7796 KiB/s
[   58.636805] mtd_speedtest: testing 2 page write speed
[   61.612427] mtd_speedtest: 2 page write speed is 2757 KiB/s
[   61.618021] mtd_speedtest: testing 2 page read speed
[   62.672653] mtd_speedtest: 2 page read speed is 7804 KiB/s
[   62.678159] mtd_speedtest: Testing erase speed
[   62.903617] mtd_speedtest: erase speed is 37063 KiB/s
[   62.908678] mtd_speedtest: Testing 2x multi-block erase speed
[   63.134083] mtd_speedtest: 2x multi-block erase speed is 37292 KiB/s
[   63.140442] mtd_speedtest: Testing 4x multi-block erase speed
[   63.364262] mtd_speedtest: 4x multi-block erase speed is 37566 KiB/s
[   63.370632] mtd_speedtest: Testing 8x multi-block erase speed
[   63.595740] mtd_speedtest: 8x multi-block erase speed is 37344 KiB/s
[   63.602089] mtd_speedtest: Testing 16x multi-block erase speed
[   63.827426] mtd_speedtest: 16x multi-block erase speed is 37320 KiB/s
[   63.833860] mtd_speedtest: Testing 32x multi-block erase speed
[   64.059389] mtd_speedtest: 32x multi-block erase speed is 37288 KiB/s
[   64.065833] mtd_speedtest: Testing 64x multi-block erase speed
[   64.290609] mtd_speedtest: 64x multi-block erase speed is 37415 KiB/s
[   64.297063] mtd_speedtest: finished
[   64.300555] =================================================

Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20240922-airoha-spi-fixes-v3-1-f958802b3d68@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:25 +02:00
Uwe Kleine-König
494c3dc467 spi: Switch back to struct platform_driver::remove()
After commit 0edb555a65 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.

Convert all platform drivers below drivers/spi to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.

The change for the spi-npcm-fiu stands out in the diffstat because the
inconsistent formatting style of the platform_driver initializer is
fixed to match the other struct initializer in the file.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20240925113501.25208-2-u.kleine-koenig@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:23 +02:00
Markus Elfring
610442f85c spi: slave-mt27xx: Call clk_disable_unprepare() only once in mtk_spi_slave_probe()
A clk_disable_unprepare(mdata->spi_clk) call was immediately used
after a return value check for a devm_spi_register_controller() call
in this function implementation.
Thus call such a function only once instead directly before the check.

This issue was transformed by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Link: https://patch.msgid.link/9e736d33-b07f-40a0-8fb6-8c3212593b77@web.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:23 +02:00
Jinjie Ruan
003c7e0191 spi: spi-fsl-lpspi: Use IRQF_NO_AUTOEN flag in request_irq()
disable_irq() after request_irq() still has a time gap in which
interrupts can come. request_irq() with IRQF_NO_AUTOEN flag will
disable IRQ auto-enable when request IRQ.

Fixes: 9728fb3ce1 ("spi: lpspi: disable lpspi module irq in DMA mode")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240906022828.891812-1-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:22 +02:00
Yan Zhen
89980d3a34 spi: fix typo in the comment
Correctly spelled comments make it easier for the reader to understand
the code.

Replace 'progrom' with 'program' in the comment &
replace 'Recevie' with 'Receive' in the comment &
replace 'receieved' with 'received' in the comment &
replace 'ajacent' with 'adjacent' in the comment &
replace 'trasaction' with 'transaction' in the comment &
replace 'pecularity' with 'peculiarity' in the comment &
replace 'resiter' with 'register' in the comment &
replace 'tansmition' with 'transmission' in the comment &
replace 'Deufult' with 'Default' in the comment &
replace 'tansfer' with 'transfer' in the comment &
replace 'settign' with 'setting' in the comment.

Signed-off-by: Yan Zhen <yanzhen@vivo.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://patch.msgid.link/20240914095213.298256-1-yanzhen@vivo.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:21 +02:00
Dragan Simic
1482c40b44 spi: rockchip-sfc: Use dev_err_probe() in the probe path
Use function dev_err_probe() in the probe path instead of dev_err() where
appropriate, to make the code a bit more uniform and compact.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/8f65c1ec7737af7f2a538fcae3618756a53ba3fa.1727337732.git.dsimic@manjaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:15 +02:00
Dragan Simic
6c510eac15 spi: rockchip-sfc: Perform trivial code cleanups
Perform a couple of trivial code cleanups, to avoid unnecessary line wrapping
by using the 100-column width a bit better, and to drop a stray empty line.

No intended functional changes are introduced by these code cleanups.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/251242bfc9c4fdc01d930f093022ce0c9481d58e.1727337732.git.dsimic@manjaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:14 +02:00
Dragan Simic
d87ec94e48 spi: rockchip: Perform trivial code cleanups
Perform a few trivial code cleanups, to obey the reverse Christmas tree rule,
to avoid unnecessary line wrapping by using the 100-column width better, to
actually obey the 100-column width in one case, and to make the way a couple
of wrapped function arguments are indented a bit more readable.

No intended functional changes are introduced by these code cleanups.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/663ec6bb472ab83bb5824a09d11b36ef20a43fc7.1727337732.git.dsimic@manjaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:13 +02:00
Yang Yingliang
0809a9ccac spi: remove {devm_}spi_alloc_master/slave()
All the {devm_}spi_alloc_master/slave() have been replaced,
so they can be removed and replaced in doc and comment.

No functional changed.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://patch.msgid.link/20240902125947.1368-8-yangyingliang@huaweicloud.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:07 +02:00
Yang Yingliang
4bca15a56e spi: slave-mt27xx: switch to use spi_alloc_target()
Switch to use modern name function spi_alloc_target().

No functional changed.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://patch.msgid.link/20240902125947.1368-5-yangyingliang@huaweicloud.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:05 +02:00
Yang Yingliang
0191e98ae6 spi: ch341: switch to use devm_spi_alloc_host()
Switch to use modern name function devm_spi_alloc_host().

No functional changed.

Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://patch.msgid.link/20240902125947.1368-4-yangyingliang@huaweicloud.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:12:04 +02:00
Raju Rangoju
6c30eee359 spi: spi_amd: Add HIDDMA basic read support
SPI index mode has hardware limitation of reading only 64 bytes per
transaction due to fixed number of FIFO registers. This constraint leads
to performance issues when reading data from NAND/NOR flash devices, as the
controller must issue multiple requests to read 64-byte chunks, even if the
slave can send up to 2 or 4 KB in single transaction. The AMD HID2 SPI
controller supports DMA mode, which allows reading up to 4 KB of data in
single transaction. This patch introduces changes to implement HID2 DMA
read support for the HID2 SPI controller.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-9-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:56 +02:00
Raju Rangoju
9674f1694e spi: spi_amd: Set controller address mode
Add changes to set the controller address mode before initiating commands.
The AMD SPI0 controller(AMDI0062) supports both 24-bit and 32-bit address
modes, while the HID2 SPI controller(AMDI0063) supports only the 24-bit
address mode. So this change is applicable only for SPI0 controller.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-8-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:55 +02:00
Raju Rangoju
145d61c0ab spi: spi_amd: Add support for HID2 SPI controller
AMD SoC has HID2 SPI controller in addition to the existing SPI0
controller(AMDI0062). Add HID2 SPI controller's ACPI ID AMDI0063 with its
version ID to the list of supported devices. Use the version ID to
differentiate the register offsets.

And, the AMD HID2 SPI controller supports DMA read, allowing for up to 4 KB
of data to be read in single transaction. Update the SPI-MEM support
function to reflect this capability.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-7-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:54 +02:00
Raju Rangoju
d97735d42a spi: spi_amd: Optimize IO operations
Read and write the maximum number of data bytes at once, rather than byte
by byte. This improves AMD SPI controller driver performance by reducing
the time required to access FIFO registers. For example, with the new
changes, 64 bytes of data from the FIFO queue can be read in 8 read calls
(8 bytes per call) instead of 64 read calls(1 byte per call).

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-6-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:54 +02:00
Raju Rangoju
8cd9141ad4 spi: spi_amd: Updates to set tx/rx count functions
AMD SPI TX and RX counter registers are 1-byte length registers. The
existing value will be overwritten during register write, so masking is not
required.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-5-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:53 +02:00
Raju Rangoju
efd9834b86 spi: spi_amd: Replace ioread/iowrite calls
All `ioread*` and `iowrite*` functions are better suited for architecture
independent code to ensure portability across different architectures.
Since AMD SoCs support only the x86 architecture, replacing all `ioread*`
and `iowrite*` calls with `read*` and `write*` calls can reduce the
overhead of ensuring portability and increase the speed of I/O operations.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-4-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:52 +02:00
Raju Rangoju
769c16fa86 spi: spi_amd: Enable dual and quad I/O modes
The current spi_amd driver only supports single I/O mode, despite the AMD
SPI controller's capability for dual and quad I/O modes for read
operations. And AMD SPI0 controller has limited support for quad mode
write operations. Update the SPI-MEM support function to reflect these
hardware capabilities.

Co-developed-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Signed-off-by: Krishnamoorthi M <krishnamoorthi.m@amd.com>
Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-3-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:51 +02:00
Raju Rangoju
d6dc8b7534 spi: spi_amd: Sort headers alphabetically
Sorting headers alphabetically helps locating duplicates, and makes it
easier to figure out where to insert new headers.

Co-developed-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Akshata MukundShetty <akshata.mukundshetty@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20240925133644.2922359-2-Raju.Rangoju@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-30 01:11:50 +02:00
Al Viro
cb787f4ac0 [tree-wide] finally take no_llseek out
no_llseek had been defined to NULL two years ago, in commit 868941b144
("fs: remove no_llseek")

To quote that commit,

  At -rc1 we'll need do a mechanical removal of no_llseek -

  git grep -l -w no_llseek | grep -v porting.rst | while read i; do
	sed -i '/\<no_llseek\>/d' $i
  done

  would do it.

Unfortunately, that hadn't been done.  Linus, could you do that now, so
that we could finally put that thing to rest? All instances are of the
form
	.llseek = no_llseek,
so it's obviously safe.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2024-09-27 08:18:43 -07:00
Linus Torvalds
075dbe9f6e Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC update from Arnd Bergmann:
 "Convert ep93xx to devicetree

  This concludes a long journey towards replacing the old board files
  with devictree description on the Cirrus Logic EP93xx platform.

  Nikita Shubin has been working on this for a long time, for details
  see the last post on

    https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/"

* tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits)
  dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples
  MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer
  soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config
  net: cirrus: use u8 for addr to calm down sparse
  dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0
  dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe()
  pinctrl: ep93xx: Fix raster pins typo
  spi: ep93xx: update kerneldoc comments for ep93xx_spi
  clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate()
  clk: ep93xx: add module license
  dmaengine: cirrus: remove platform code
  ASoC: cirrus: edb93xx: Delete driver
  ARM: ep93xx: soc: drop defines
  ARM: ep93xx: delete all boardfiles
  ata: pata_ep93xx: remove legacy pinctrl use
  pwm: ep93xx: drop legacy pinctrl
  ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms
  ARM: dts: ep93xx: Add EDB9302 DT
  ARM: dts: ep93xx: add ts7250 board
  ARM: dts: add Cirrus EP93XX SoC .dtsi
  ...
2024-09-26 12:00:25 -07:00
Linus Torvalds
fe29393877 Merge tag 'spi-fix-v6.12-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
 "Some driver specific fixes that came in during the merge window.

  Lorenzo Bianconi did some extra testing on the recently added arioha
  driver and found some issues, Alexander Dahl fixed some issues with
  signal delays in the Atmel QSPI driver and Jinjie Ruan has been fixing
  some nits with runtime PM cleanup"

* tag 'spi-fix-v6.12-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: atmel-quadspi: Avoid overwriting delay register settings
  spi: airoha: remove read cache in airoha_snand_dirmap_read()
  spi: spi-fsl-lpspi: Undo runtime PM changes at driver exit time
  spi: atmel-quadspi: Undo runtime PM changes at driver exit time
  spi: airoha: fix airoha_snand_{write,read}_data data_len estimation
  spi: airoha: fix dirmap_{read,write} operations
2024-09-25 14:49:34 -07:00
Alexander Dahl
329ca3eed4 spi: atmel-quadspi: Avoid overwriting delay register settings
Previously the MR and SCR registers were just set with the supposedly
required values, from cached register values (cached reg content
initialized to zero).

All parts fixed here did not consider the current register (cache)
content, which would make future support of cs_setup, cs_hold, and
cs_inactive impossible.

Setting SCBR in atmel_qspi_setup() erases a possible DLYBS setting from
atmel_qspi_set_cs_timing().  The DLYBS setting is applied by ORing over
the current setting, without resetting the bits first.  All writes to MR
did not consider possible settings of DLYCS and DLYBCT.

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Fixes: f732646d0c ("spi: atmel-quadspi: Add support for configuring CS timing")
Link: https://patch.msgid.link/20240918082744.379610-2-ada@thorsis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-20 11:41:19 +02:00
Lorenzo Bianconi
fffca269e4 spi: airoha: remove read cache in airoha_snand_dirmap_read()
Current upstream driver reports errors running mtd_oobtest kernel module
test:

root@OpenWrt:/# insmod mtd_test.ko
root@OpenWrt:/# insmod mtd_oobtest.ko dev=5
[ 7023.730584] =================================================
[ 7023.736399] mtd_oobtest: MTD device: 5
[ 7023.740160] mtd_oobtest: MTD device size 3670016, eraseblock size 131072, page size 2048, count of eraseblocks 28, pages per eraseblock 64, OOB size 128
[ 7023.753837] mtd_test: scanning for bad eraseblocks
[ 7023.758636] mtd_test: scanned 28 eraseblocks, 0 are bad
[ 7023.763861] mtd_oobtest: test 1 of 5
[ 7024.042076] mtd_oobtest: writing OOBs of whole device
[ 7024.682069] mtd_oobtest: written up to eraseblock 0
[ 7041.962077] mtd_oobtest: written 28 eraseblocks
[ 7041.966626] mtd_oobtest: verifying all eraseblocks
[ 7041.972276] mtd_oobtest: error @addr[0x0:0x0] 0xff -> 0xe diff 0xf1
[ 7041.978550] mtd_oobtest: error @addr[0x0:0x1] 0xff -> 0x10 diff 0xef
[ 7041.984932] mtd_oobtest: error @addr[0x0:0x2] 0xff -> 0x82 diff 0x7d
[ 7041.991293] mtd_oobtest: error @addr[0x0:0x3] 0xff -> 0x10 diff 0xef
[ 7041.997659] mtd_oobtest: error @addr[0x0:0x4] 0xff -> 0x0 diff 0xff
[ 7042.003942] mtd_oobtest: error @addr[0x0:0x5] 0xff -> 0x8a diff 0x75
[ 7042.010294] mtd_oobtest: error @addr[0x0:0x6] 0xff -> 0x20 diff 0xdf
[ 7042.016659] mtd_oobtest: error @addr[0x0:0x7] 0xff -> 0x1 diff 0xfe
[ 7042.022935] mtd_oobtest: error @addr[0x0:0x8] 0xff -> 0x2e diff 0xd1
[ 7042.029295] mtd_oobtest: error @addr[0x0:0x9] 0xff -> 0x40 diff 0xbf
[ 7042.035661] mtd_oobtest: error @addr[0x0:0xa] 0xff -> 0x0 diff 0xff
[ 7042.041935] mtd_oobtest: error @addr[0x0:0xb] 0xff -> 0x89 diff 0x76
[ 7042.048300] mtd_oobtest: error @addr[0x0:0xc] 0xff -> 0x82 diff 0x7d
[ 7042.054662] mtd_oobtest: error @addr[0x0:0xd] 0xff -> 0x15 diff 0xea
[ 7042.061014] mtd_oobtest: error @addr[0x0:0xe] 0xff -> 0x90 diff 0x6f
[ 7042.067380] mtd_oobtest: error @addr[0x0:0xf] 0xff -> 0x0 diff 0xff
....
[ 7432.421369] mtd_oobtest: error @addr[0x237800:0x36] 0xff -> 0x5f diff 0xa0
[ 7432.428242] mtd_oobtest: error @addr[0x237800:0x37] 0xff -> 0x21 diff 0xde
[ 7432.435118] mtd_oobtest: error: verify failed at 0x237800
[ 7432.440510] mtd_oobtest: error: too many errors
[ 7432.445053] mtd_oobtest: error -1 occurred

The above errors are due to the buggy logic in the 'read cache' available
in airoha_snand_dirmap_read() routine since there are some corner cases
where we are missing data updates. Since we do not get any read/write speed
improvement using the cache (according to the mtd_speedtest kernel
module test), in order to fix the mtd_oobtest test, remove the 'read cache'
in airoha_snand_dirmap_read routine. Now the driver is passing all the
tests available in mtd_test suite.

Fixes: a403997c12 ("spi: airoha: add SPI-NAND Flash controller driver")
Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20240919-airoha-spi-fixes-v2-1-cb0f0ed9920a@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-20 10:08:05 +02:00
Jinjie Ruan
3b577de206 spi: spi-fsl-lpspi: Undo runtime PM changes at driver exit time
It's important to undo pm_runtime_use_autosuspend() with
pm_runtime_dont_use_autosuspend() at driver exit time unless driver
initially enabled pm_runtime with devm_pm_runtime_enable()
(which handles it for you).

Hence, call pm_runtime_dont_use_autosuspend() at driver exit time
to fix it.

Fixes: 944c01a889 ("spi: lpspi: enable runtime pm for lpspi")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240906021251.610462-1-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-19 12:51:20 +02:00
Jinjie Ruan
438efb23f9 spi: atmel-quadspi: Undo runtime PM changes at driver exit time
It's important to undo pm_runtime_use_autosuspend() with
pm_runtime_dont_use_autosuspend() at driver exit time unless driver
initially enabled pm_runtime with devm_pm_runtime_enable()
(which handles it for you).

Hence, call pm_runtime_dont_use_autosuspend() at driver exit time
to fix it.

Fixes: 4a2f83b7f7 ("spi: atmel-quadspi: add runtime pm support")
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Link: https://patch.msgid.link/20240906023956.1004440-1-ruanjinjie@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-19 12:51:19 +02:00
Lorenzo Bianconi
0e58637eb9 spi: airoha: fix airoha_snand_{write,read}_data data_len estimation
Fix data length written and read in airoha_snand_write_data and
airoha_snand_read_data routines respectively if it is bigger than
SPI_MAX_TRANSFER_SIZE.

Fixes: a403997c12 ("spi: airoha: add SPI-NAND Flash controller driver")
Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20240913-airoha-spi-fixes-v1-2-de2e74ed4664@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-18 15:10:33 +02:00
Lorenzo Bianconi
2e6bbfe7b0 spi: airoha: fix dirmap_{read,write} operations
SPI_NFI_READ_FROM_CACHE_DONE bit must be written at the end of
dirmap_read operation even if it is already set.
In the same way, SPI_NFI_LOAD_TO_CACHE_DONE bit must be written at the
end of dirmap_write operation even if it is already set.
For this reason use regmap_write_bits() instead of regmap_set_bits().
This patch fixes mtd_pagetest kernel module test.

Fixes: a403997c12 ("spi: airoha: add SPI-NAND Flash controller driver")
Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20240913-airoha-spi-fixes-v1-1-de2e74ed4664@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2024-09-18 15:10:32 +02:00
Linus Torvalds
303ba85c60 Merge tag 'spi-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
 "This is quite a quiet release for SPI. The one new core feature here
  is support for configuring the state of the MOSI pin when the bus is
  idle, there are some devices which are very fragile in this regard
  even when the chip select signal is not asserted. Otherwise we have
  some new driver support, a bunch of small fixes and some general
  cleanup work.

   - Support for configuring the state of the MOSI pin when the the bus
     is idle

   - Add the Elgin JG0309-01 in spidev

   - Support for Marvell xSPI, Mediatek MTK7981, Microchip PIC64GX, NXP
     i.MX8ULP, and Rockchip RK3576 controllers

  I also accidentally pulled in an IIO DT bindings update due to a typo
  when applying the MOSI idle state patches"

* tag 'spi-v6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (65 commits)
  spi: geni-qcom: Use devm functions to simplify code
  spi: remove spi_controller_is_slave() and spi_slave_abort()
  platform/olpc: olpc-xo175-ec: switch to use spi_target_abort().
  spi: slave-mt27xx: switch to use target_abort
  spi: spidev: switch to use spi_target_abort()
  spi: slave-system-control: switch to use spi_target_abort()
  spi: slave-time: switch to use spi_target_abort()
  spi: switch to use spi_controller_is_target()
  spi: fspi: add support for imx8ulp
  spi: fspi: involve lut_num for struct nxp_fspi_devtype_data
  dt-bindings: spi: nxp-fspi: add imx8ulp support
  spi: spidev_fdx: Fix the wrong format specifier
  spi: mxs: Switch to RUNTIME/SYSTEM_SLEEP_PM_OPS()
  spi: dt-bindings: Add rockchip,rk3576-spi compatible
  spi: Revert "spi: Insert the missing pci_dev_put()before return"
  spi: zynq-qspi: Replace kzalloc with kmalloc for buffer allocation
  spi: ppc4xx: Sort headers
  spi: ppc4xx: Revert "handle irq_of_parse_and_map() errors"
  spi: zynqmp-gqspi: Simplify with dev_err_probe()
  spi: zynqmp-gqspi: Use devm_spi_alloc_host()
  ...
2024-09-17 10:31:31 +02:00