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This commit adds the dt-binding for KSZ8567, a robust 7-port Ethernet switch. The KSZ8567 features two RGMII/MII/RMII interfaces, each capable of gigabit speeds, complemented by five 10/100 Mbps MAC/PHYs. This binding is necessary to set specific capabilities for this switch chip that are necessary due to the ksz dsa driver only accepting specific chip ids. The KSZ8567 is very similar to KSZ9567 however only containing 100 Mbps phys on its downstream ports. Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20240130083419.135763-1-dev@pschenker.ch Signed-off-by: Paolo Abeni <pabeni@redhat.com>
218 lines
5.9 KiB
YAML
218 lines
5.9 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip KSZ Series Ethernet switches
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maintainers:
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- Marek Vasut <marex@denx.de>
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- Woojung Huh <Woojung.Huh@microchip.com>
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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# See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional
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# required and optional properties.
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compatible:
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enum:
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- microchip,ksz8765
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- microchip,ksz8794
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- microchip,ksz8795
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- microchip,ksz8863
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- microchip,ksz8873
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- microchip,ksz9477
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- microchip,ksz9897
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- microchip,ksz9896
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- microchip,ksz9567
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- microchip,ksz8565
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- microchip,ksz9893
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- microchip,ksz9563
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- microchip,ksz8563
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- microchip,ksz8567
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reset-gpios:
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description:
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Should be a gpio specifier for a reset line.
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maxItems: 1
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wakeup-source: true
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microchip,synclko-125:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Set if the output SYNCLKO frequency should be set to 125MHz instead of 25MHz.
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microchip,synclko-disable:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Set if the output SYNCLKO clock should be disabled. Do not mix with
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microchip,synclko-125.
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microchip,io-drive-strength-microamp:
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description:
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IO Pad Drive Strength
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enum: [8000, 16000]
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default: 16000
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microchip,hi-drive-strength-microamp:
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description:
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High Speed Drive Strength. Controls drive strength of GMII / RGMII /
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MII / RMII (except TX_CLK/REFCLKI, COL and CRS) and CLKO_25_125 lines.
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enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
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default: 24000
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microchip,lo-drive-strength-microamp:
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description:
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Low Speed Drive Strength. Controls drive strength of TX_CLK / REFCLKI,
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COL, CRS, LEDs, PME_N, NTRP_N, SDO and SDI/SDA/MDIO lines.
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enum: [2000, 4000, 8000, 12000, 16000, 20000, 24000, 28000]
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default: 8000
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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if:
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not:
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properties:
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compatible:
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enum:
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- microchip,ksz8863
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- microchip,ksz8873
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then:
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$ref: dsa.yaml#/$defs/ethernet-ports
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else:
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patternProperties:
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"^(ethernet-)?ports$":
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patternProperties:
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"^(ethernet-)?port@[0-2]$":
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$ref: dsa-port.yaml#
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unevaluatedProperties: false
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properties:
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microchip,rmii-clk-internal:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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When ksz88x3 is acting as clock provier (via REFCLKO) it
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can select between internal and external RMII reference
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clock. Internal reference clock means that the clock for
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the RMII of ksz88x3 is provided by the ksz88x3 internally
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and the REFCLKI pin is unconnected. For the external
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reference clock, the clock needs to be fed back to ksz88x3
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via REFCLKI.
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If microchip,rmii-clk-internal is set, ksz88x3 will provide
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rmii reference clock internally, otherwise reference clock
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should be provided externally.
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dependencies:
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microchip,rmii-clk-internal: [ethernet]
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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// Ethernet switch connected via SPI to the host, CPU port wired to eth0:
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eth0 {
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&pinctrl_spi_ksz>;
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cs-gpios = <&pioC 25 0>;
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id = <1>;
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ksz9477: switch@0 {
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compatible = "microchip,ksz9477";
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reg = <0>;
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reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
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spi-max-frequency = <44000000>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@4 {
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reg = <4>;
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label = "lan5";
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};
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port@5 {
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reg = <5>;
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ethernet = <ð0>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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ksz8565: switch@1 {
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compatible = "microchip,ksz8565";
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reg = <1>;
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spi-max-frequency = <44000000>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@6 {
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reg = <6>;
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ethernet = <ð0>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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...
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