Pull drm updates from Dave Airlie:
 "Highlights:
   - new DRM RAS infrastructure using netlink
   - amdgpu: enable DC on CIK APUs, and more IP enablement, and more
     user queue work
   - xe: purgeable BO support, and new hw enablement
   - dma-buf : add revocable operations

  Full summary:

  mm:
   - two-pass MMU interval notifiers
   - add gpu active/reclaim per-node stat counters

  math:
   - provide __KERNEL_DIV_ROUND_CLOSEST() in UAPI
   - implement DIV_ROUND_CLOSEST() with __KERNEL_DIV_ROUND_CLOSEST()

  rust:
   - shared tag with driver-core: register macro and io infra
   - core: rework DMA coherent API
   - core: add interop::list to interop with C linked lists
   - core: add more num::Bounded operations
   - core: enable generic_arg_infer and add EMSGSIZE
   - workqueue: add ARef<T> support for work and delayed work
   - add GPU buddy allocator abstraction
   - add DRM shmem GEM helper abstraction
   - allow drm:::Device to dispatch work and delayed work items
     to driver private data
   - add dma_resv_lock helper and raw accessors

  core:
   - introduce DRM RAS infrastructure over netlink
   - add connector panel_type property
   - fourcc: add ARM interleaved 64k modifier
   - colorop: add destroy helper
   - suballoc: split into alloc and init helpers
   - mode: provide DRM_ARGB_GET*() macros for reading color components

  edid:
   - provide drm_output_color_Format

  dma-buf:
   - provide revoke mechanism for shared buffers
   - rename move_notify to invalidate_mappings
   - always enable move_notify
   - protect dma_fence_ops with RCU and improve locking
   - clean pages with helpers

  atomic:
   - allocate drm_private_state via callback
   - helper: use system_percpu_wq

  buddy:
   - make buddy allocator available to gpu level
   - add kernel-doc for buddy allocator
   - improve aligned allocation

  ttm:
   - fix fence signalling
   - improve tests and docs
   - improve handling of gfp_retry_mayfail
   - use per-node stat counters to track memory allocations
   - port pool to use list_lru
   - drop NUMA specific pools
   - make pool shrinker numa aware
   - track allocated pages per numa node

  coreboot:
   - cleanup coreboot framebuffer support

  sched:
   - fix race condition in drm_sched_fini

  pagemap:
   - enable THP support
   - pass pagemap_addr by reference

  gem-shmem:
   - Track page accessed/dirty status across mmap/vmap

  gpusvm:
   - reenable device to device migration
   - fix unbalanced unclock

  bridge:
   - anx7625: Support USB-C plus DT bindings
   - connector: Fix EDID detection
   - dw-hdmi-qp: Support Vendor-Specfic and SDP Infoframes; improve
     others
   - fsl-ldb: Fix visual artifacts plus related DT property
     'enable-termination-resistor'
   - imx8qxp-pixel-link: Improve bridge reference handling
   - lt9611: Support Port-B-only input plus DT bindings
   - tda998x: Support DRM_BRIDGE_ATTACH_NO_CONNECTOR; Clean up
   - Support TH1520 HDMI plus DT bindings
   - waveshare-dsi: Fix register and attach; Support 1..4 DSI lanes plus
     DT bindings
   - anx7625: Fix USB Type-C handling
   - cdns-mhdp8546-core: Handle HDCP state in bridge atomic_check
   - Support Lontium LT8713SX DP MST bridge plus DT bindings
   - analogix_dp: Use DP helpers for link training

  panel:
   - panel-jdi-lt070me05000: Use mipi-dsi multi functions
   - panel-edp: Support Add AUO B116XAT04.1 (HW: 1A); Support CMN
     N116BCL-EAK (C2); Support FriendlyELEC plus DT changes
   - panel-edp: Fix timings for BOE NV140WUM-N64
   - ilitek-ili9882t: Allow GPIO calls to sleep
   - jadard: Support TAIGUAN XTI05101-01A
   - lxd: Support LXD M9189A plus DT bindings
   - mantix: Fix pixel clock; Clean up
   - motorola: Support Motorola Atrix 4G and Droid X2 plus DT bindings
   - novatek: Support Novatek/Tianma NT37700F plus DT bindings
   - simple: Support EDT ET057023UDBA plus DT bindings; Support Powertip
     PH800480T032-ZHC19 plus DT bindings; Support Waveshare 13.3"
   - novatek-nt36672a: Use mipi_dsi_*_multi() functions
   - panel-edp: Support BOE NV153WUM-N42, CMN N153JCA-ELK, CSW
     MNF307QS3-2
   - support Himax HX83121A plus DT bindings
   - support JuTouch JT070TM041 plus DT bindings
   - support Samsung S6E8FC0 plus DT bindings
   - himax-hx83102c: support Samsung S6E8FC0 plus DT bindings; support
     backlight
   - ili9806e: support Rocktech RK050HR345-CT106A plus DT bindings
   - simple: support Tianma TM050RDH03 plus DT bindings

  amdgpu:
   - enable DC by default on CIK APUs
   - userq fence ioctl param size fixes
   - set panel_type to OLED for eDP
   - refactor DC i2c code
   - FAMS2 update
   - rework ttm handling to allow multiple engines
   - DC DCE 6.x cleanup
   - DC support for NUTMEG/TRAVIS DP bridge
   - DCN 4.2 support
   - GC12 idle power fix for compute
   - use struct drm_edid in non-DC code
   - enable NV12/P010 support on primary planes
   - support newer IP discovery tables
   - VCN/JPEG 5.0.2 support
   - GC/MES 12.1 updates
   - USERQ fixes
   - add DC idle state manager
   - eDP DSC seamless boot

  amdkfd:
   - GC 12.1 updates
   - non 4K page fixes

  xe:
   - basic Xe3p_LPG and NVL-P enabling patches
   - allow VM_BIND decompress support
   - add purgeable buffer object support
   - add xe_vm_get_property_ioctl
   - restrict multi-lrc to VCS/VECS engines
   - allow disabling VM overcommit in fault mode
   - dGPU memory optimizations
   - Workaround cleanups and simplification
   - Allow VFs VRAM quote changes using sysfs
   - convert GT stats to per-cpu counters
   - pagefault refactors
   - enable multi-queue on xe3p_xpc
   - disable DCC on PTL
   - make MMIO communication more robust
   - disable D3Cold for BMG on specific platforms
   - vfio: improve FLR sync for Xe VFIO

  i915/display:
   - C10/C20/LT PHY PLL divider verification
   - use trans push mechanism to generate PSR frame change on LNL+
   - refactor DP DSC slice config
   - VGA decode refactoring
   - refactor DPT, gen2-4 overlay, masked field register macro helpers
   - refactor stolen memory allocation decisions
   - prepare for UHBR DP tunnels
   - refactor LT PHY PLL to use DPLL framework
   - implement register polling/waiting in display code
   - add shared stepping header between i915 and display

  i915:
   - fix potential overflow of shmem scatterlist length

  nouveau:
   - provide Z cull info to userspace
   - initial GA100 support
   - shutdown on PCI device shutdown

  nova-core:
   - harden GSP command queue
   - add support for large RPCs
   - simplify GSP sequencer and message handling
   - refactor falcon firmware handling
   - convert to new register macro
   - conver to new DMA coherent API
   - use checked arithmetic
   - add debugfs support for gsp-rm log buffers
   - fix aux device registration for multi-GPU

  msm:
   - CI:
      - Uprev mesa
      - Restore CI jobs for Qualcomm APQ8016 and APQ8096 devices
   - Core:
      - Switched to of_get_available_child_by_name()
   - DPU:
      - Fixes for DSC panels
      - Fixed brownout because of the frequency / OPP mismatch
      - Quad pipe preparation (not enabled yet)
      - Switched to virtual planes by default
      - Dropped VBIF_NRT support
      - Added support for Eliza platform
      - Reworked alpha handling
      - Switched to correct CWB definitions on Eliza
      - Dropped dummy INTF_0 on MSM8953
      - Corrected INTFs related to DP-MST
   - DP:
      - Removed debug prints looking into PHY internals
   - DSI:
      - Fixes for DSC panels
      - RGB101010 support
      - Support for SC8280XP
      - Moved PHY bindings from display/ to phy/
   - GPU:
      - Preemption support for x2-85 and a840
      - IFPC support for a840
      - SKU detection support for x2-85 and a840
      - Expose AQE support (VK ray-pipeline)
      - Avoid locking in VM_BIND fence signaling path
      - Fix to avoid reclaim in GPU snapshot path
      - Disallow foreign mapping of _NO_SHARE BOs
   - HDMI:
      - Fixed infoframes programming
   - MDP5:
      - Dropped support for MSM8974v1
      - Dropped now unused code for MSM8974 v1 and SDM660 / MSM8998

  panthor:
   - add tracepoints for power and IRQs
   - fix fence handling
   - extend timestamp query with flags
   - support various sources for timestamp queries

  tyr:
   - fix names and model/versions

  rockchip:
   - vop2: use drm logging function
   - rk3576 displayport support
   - support CRTC background color

  atmel-hlcdc:
   - support sana5d65 LCD controller

  tilcdc:
   - use DT bindings schema
   - use managed DRM interfaces
   - support DRM_BRIDGE_ATTACH_NO_CONNECTOR

  verisilicon:
   - support DC8200 + DT bindings

  virtgpu:
   - support PRIME import with 3D enabled

  komeda:
   - fix integer overflow in AFBC checks

  mcde:
   - improve bridge handling

  gma500:
   - use drm client buffer for fbdev framebuffer

  amdxdna:
   - add sensors ioctls
   - provide NPU power estimate
   - support column utilization sensor
   - allow forcing DMA through IOMMU IOVA
   - support per-BO mem usage queries
   - refactor GEM implementation

  ivpu:
   - update boot API to v3.29.4
   - limit per-user number of doorbells/contexts
   - perform engine reset on TDR error

  loongson:
   - replace custom code with drm_gem_ttm_dumb_map_offset()

  imx:
   - support planes behind the primary plane
   - fix bus-format selection

  vkms:
   - support CRTC background color

  v3d:
   - improve handling of struct v3d_stats

  komeda:
   - support Arm China Linlon D6 plus DT bindings

  imagination:
   - improve power-off sequence
   - support context-reset notification from firmware

  mediatek:
   - mtk_dsi: enable hs clock during pre-enable
   - Remove all conflicting aperture devices during probe
   - Add support for mt8167 display blocks"

* tag 'drm-next-2026-04-15' of https://gitlab.freedesktop.org/drm/kernel: (1735 commits)
  drm/ttm/tests: Remove checks from ttm_pool_free_no_dma_alloc
  drm/ttm/tests: fix lru_count ASSERT
  drm/vram: remove DRM_VRAM_MM_FILE_OPERATIONS from docs
  drm/fb-helper: Fix a locking bug in an error path
  dma-fence: correct kernel-doc function parameter @flags
  ttm/pool: track allocated_pages per numa node.
  ttm/pool: make pool shrinker NUMA aware (v2)
  ttm/pool: drop numa specific pools
  ttm/pool: port to list_lru. (v2)
  drm/ttm: use gpu mm stats to track gpu memory allocations. (v4)
  mm: add gpu active/reclaim per-node stat counters (v2)
  gpu: nova-core: fix missing colon in SEC2 boot debug message
  gpu: nova-core: vbios: use from_le_bytes() for PCI ROM header parsing
  gpu: nova-core: bitfield: fix broken Default implementation
  gpu: nova-core: falcon: pad firmware DMA object size to required block alignment
  gpu: nova-core: gsp: fix undefined behavior in command queue code
  drm/shmem_helper: Make sure PMD entries get the writeable upgrade
  accel/ivpu: Trigger recovery on TDR with OS scheduling
  drm/msm: Use of_get_available_child_by_name()
  dt-bindings: display/msm: move DSI PHY bindings to phy/ subdir
  ...
This commit is contained in:
Linus Torvalds
2026-04-15 08:45:00 -07:00
1734 changed files with 163212 additions and 28451 deletions

View File

@@ -199,6 +199,7 @@ Christophe Leroy <chleroy@kernel.org> <christophe.leroy2@cs-soprasteria.com>
Christophe Ricard <christophe.ricard@gmail.com>
Christopher Obbard <christopher.obbard@linaro.org> <chris.obbard@collabora.com>
Christoph Hellwig <hch@lst.de>
Christoph Manszewski <c.manszewski@gmail.com> <christoph.manszewski@intel.com>
Chuck Lever <chuck.lever@oracle.com> <cel@kernel.org>
Chuck Lever <chuck.lever@oracle.com> <cel@netapp.com>
Chuck Lever <chuck.lever@oracle.com> <cel@citi.umich.edu>

View File

@@ -129,6 +129,37 @@ Description:
-EIO if FW refuses to change the provisioning.
What: /sys/bus/pci/drivers/xe/.../sriov_admin/.bulk_profile/vram_quota
What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/profile/vram_quota
Date: February 2026
KernelVersion: 7.0
Contact: intel-xe@lists.freedesktop.org
Description:
These files allow to perform initial VFs VRAM provisioning prior to VFs
enabling or to change VFs VRAM provisioning once the VFs are enabled.
Any non-zero initial VRAM provisioning will block VFs auto-provisioning.
Without initial VRAM provisioning those files will show result of the
VRAM auto-provisioning performed by the PF once the VFs are enabled.
Once the VFs are disabled, all VRAM provisioning will be released.
These files are visible only on discrete Intel Xe platforms with VRAM
and are writeable only if dynamic VFs VRAM provisioning is supported.
.bulk_profile/vram_quota: (WO) unsigned integer
The amount of the provisioned VRAM in [bytes] for each VF.
Actual quota value might be aligned per HW/FW requirements.
profile/vram_quota: (RW) unsigned integer
The amount of the provisioned VRAM in [bytes] for this VF.
Actual quota value might be aligned per HW/FW requirements.
Default is 0 (unprovisioned).
Writes to these attributes may fail with errors like:
-EINVAL if provided input is malformed or not recognized,
-EPERM if change is not applicable on given HW/FW,
-EIO if FW refuses to change the provisioning.
What: /sys/bus/pci/drivers/xe/.../sriov_admin/vf<n>/stop
Date: October 2025
KernelVersion: 6.19

View File

@@ -844,6 +844,12 @@ properties:
- google,sargo
- const: qcom,sdm670
- items:
- enum:
- google,bonito-tianma
- const: google,bonito
- const: qcom,sdm670
- items:
- enum:
- qcom,sdx55-mtp

View File

@@ -19,7 +19,9 @@ properties:
compatible:
oneOf:
- items:
- const: arm,mali-d32
- enum:
- arm,mali-d32
- armchina,linlon-d6
- const: arm,mali-d71
- const: arm,mali-d71

View File

@@ -85,6 +85,11 @@ properties:
aux-bus:
$ref: /schemas/display/dp-aux-bus.yaml#
connector:
type: object
$ref: /schemas/connector/usb-connector.yaml#
unevaluatedProperties: false
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -117,7 +122,6 @@ properties:
required:
- port@0
- port@1
required:
- compatible
@@ -127,6 +131,28 @@ required:
- vdd33-supply
- ports
allOf:
- if:
required:
- aux-bus
- connector
then:
false
- if:
required:
- connector
then:
properties:
ports:
properties:
port@1: false
else:
properties:
ports:
required:
- port@1
additionalProperties: false
examples:
@@ -185,3 +211,73 @@ examples:
};
};
};
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
encoder@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
vdd10-supply = <&pp1000_mipibrdg>;
vdd18-supply = <&pp1800_mipibrdg>;
vdd33-supply = <&pp3300_mipibrdg>;
analogix,audio-enable;
analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
connector {
compatible = "usb-c-connector";
power-role = "dual";
data-role = "dual";
vbus-supply = <&vbus_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&usb_hs>;
};
};
port@1 {
reg = <1>;
endpoint {
remote-endpoint = <&usb_ss>;
};
};
port@2 {
reg = <2>;
endpoint {
remote-endpoint = <&usb_sbu>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&mipi_dsi>;
bus-type = <7>;
data-lanes = <0 1 2 3>;
};
};
};
};
};

View File

@@ -35,6 +35,15 @@ properties:
- const: ldb
- const: lvds
nxp,enable-termination-resistor:
type: boolean
description:
Indicates that the built-in 100 Ohm termination resistor on the LVDS
output is enabled. This property is optional and controlled via the
HS_EN bit in the LVDS_CTRL register. Enabling it can improve signal
quality and prevent visual artifacts on some boards, but increases
power consumption.
ports:
$ref: /schemas/graph.yaml#/properties/ports
@@ -84,6 +93,15 @@ allOf:
required:
- reg-names
- if:
properties:
compatible:
contains:
const: fsl,imx6sx-ldb
then:
properties:
nxp,enable-termination-resistor: false
additionalProperties: false
examples:

View File

@@ -0,0 +1,113 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/lontium,lt8713sx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Lontium LT8713SX Type-C/DP1.4 to Type-C/DP1.4/HDMI2.0/DP++ bridge-hub
maintainers:
- Vishnu Saini <vishnu.saini@oss.qualcomm.com>
description:
The Lontium LT8713SX is a Type-C/DP1.4 to Type-C/DP1.4/HDMI2.0 converter
that integrates one DP input and up to three configurable output interfaces
(DP1.4 / HDMI2.0 / DP++), with SST/MST functionality and audio support.
properties:
compatible:
enum:
- lontium,lt8713sx
reg:
maxItems: 1
vcc-supply:
description: Regulator for 3.3V vcc.
vdd-supply:
description: Regulator for 1.1V vdd.
reset-gpios:
description: GPIO connected to active low RESET pin.
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
DP port for DP input from soc to bridge chip
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
DP port for DP output from bridge
port@2:
$ref: /schemas/graph.yaml#/properties/port
description:
Additional DP port for DP output from bridge
port@3:
$ref: /schemas/graph.yaml#/properties/port
description:
Additional DP port for DP output from bridge
required:
- port@0
required:
- compatible
- reg
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
bridge@4f {
compatible = "lontium,lt8713sx";
reg = <0x4f>;
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lt8713sx_dp_in: endpoint {
remote-endpoint = <&mdss_dp0_out>;
};
};
port@1 {
reg = <1>;
lt8713sx_dp0_out: endpoint {
remote-endpoint = <&dp0_connector_in>;
};
};
port@2 {
reg = <2>;
lt8713sx_dp1_out: endpoint {
remote-endpoint = <&dp1_connector_in>;
};
};
port@3 {
reg = <3>;
lt8713sx_dp2_out: endpoint {
remote-endpoint = <&dp2_connector_in>;
};
};
};
};
};

View File

@@ -44,21 +44,28 @@ properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
Primary MIPI port-1 for MIPI input
DSI Port A input. directly drives the display, or works in
combination with Port B for higher resolution displays.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
Additional MIPI port-2 for MIPI input, used in combination
with primary MIPI port-1 to drive higher resolution displays
DSI Port B input. Can be used alone if DSI is physically
connected to Port B, or in combination with Port A for higher
resolution displays.
port@2:
$ref: /schemas/graph.yaml#/properties/port
description:
HDMI port for HDMI output
anyOf:
- required:
- port@0
- required:
- port@1
required:
- port@0
- port@2
required:

View File

@@ -33,6 +33,7 @@ properties:
oneOf:
- items:
- enum:
- doestek,dtc34lm85am # For the Doestek DTC34LM85AM Flat Panel Display (FPD) Transmitter
- onnn,fin3385 # OnSemi FIN3385
- ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer
- ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer

View File

@@ -0,0 +1,120 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/thead,th1520-dw-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: T-Head TH1520 DesignWare HDMI TX Encoder
maintainers:
- Icenowy Zheng <uwu@icenowy.me>
description:
The HDMI transmitter is a Synopsys DesignWare HDMI TX controller
paired with a DesignWare HDMI Gen2 TX PHY.
allOf:
- $ref: /schemas/display/bridge/synopsys,dw-hdmi.yaml#
properties:
compatible:
enum:
- thead,th1520-dw-hdmi
reg-io-width:
const: 4
clocks:
maxItems: 4
clock-names:
items:
- const: iahb
- const: isfr
- const: cec
- const: pix
resets:
items:
- description: Main reset
- description: Configuration APB reset
reset-names:
items:
- const: main
- const: apb
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Input port connected to DC8200 DPU "DP" output
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: HDMI output port
required:
- port@0
- port@1
required:
- compatible
- reg
- reg-io-width
- clocks
- clock-names
- resets
- reset-names
- interrupts
- ports
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/thead,th1520-clk-ap.h>
#include <dt-bindings/reset/thead,th1520-reset.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
hdmi@ffef540000 {
compatible = "thead,th1520-dw-hdmi";
reg = <0xff 0xef540000 0x0 0x40000>;
reg-io-width = <4>;
interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_vo CLK_HDMI_PCLK>,
<&clk_vo CLK_HDMI_SFR>,
<&clk_vo CLK_HDMI_CEC>,
<&clk_vo CLK_HDMI_PIXCLK>;
clock-names = "iahb", "isfr", "cec", "pix";
resets = <&rst_vo TH1520_RESET_ID_HDMI>,
<&rst_vo TH1520_RESET_ID_HDMI_APB>;
reset-names = "main", "apb";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi_in: endpoint {
remote-endpoint = <&dpu_out_dp1>;
};
};
port@1 {
reg = <1>;
hdmi_out_conn: endpoint {
remote-endpoint = <&hdmi_conn_in>;
};
};
};
};
};

View File

@@ -40,9 +40,12 @@ properties:
properties:
data-lanes:
description: array of physical DSI data lane indexes.
minItems: 1
items:
- const: 1
- const: 2
- const: 3
- const: 4
required:
- data-lanes

View File

@@ -33,6 +33,7 @@ properties:
- enum:
- mediatek,mt2712-disp-aal
- mediatek,mt6795-disp-aal
- mediatek,mt8167-disp-aal
- const: mediatek,mt8173-disp-aal
- items:
- enum:

View File

@@ -25,7 +25,9 @@ properties:
- mediatek,mt8183-disp-ccorr
- mediatek,mt8192-disp-ccorr
- items:
- const: mediatek,mt8365-disp-ccorr
- enum:
- mediatek,mt8167-disp-ccorr
- mediatek,mt8365-disp-ccorr
- const: mediatek,mt8183-disp-ccorr
- items:
- enum:

View File

@@ -26,6 +26,7 @@ properties:
- mediatek,mt8183-disp-dither
- items:
- enum:
- mediatek,mt8167-disp-dither
- mediatek,mt8186-disp-dither
- mediatek,mt8188-disp-dither
- mediatek,mt8192-disp-dither

View File

@@ -28,6 +28,7 @@ properties:
- items:
- enum:
- mediatek,mt6795-disp-gamma
- mediatek,mt8167-disp-gamma
- const: mediatek,mt8173-disp-gamma
- items:
- enum:

View File

@@ -23,6 +23,7 @@ properties:
oneOf:
- enum:
- mediatek,mt2701-disp-ovl
- mediatek,mt8167-disp-ovl
- mediatek,mt8173-disp-ovl
- mediatek,mt8183-disp-ovl
- mediatek,mt8192-disp-ovl

View File

@@ -36,6 +36,7 @@ properties:
- enum:
- mediatek,mt7623-disp-rdma
- mediatek,mt2712-disp-rdma
- mediatek,mt8167-disp-rdma
- const: mediatek,mt2701-disp-rdma
- items:
- enum:

View File

@@ -24,7 +24,9 @@ properties:
- enum:
- mediatek,mt8173-disp-wdma
- items:
- const: mediatek,mt6795-disp-wdma
- enum:
- mediatek,mt6795-disp-wdma
- mediatek,mt8167-disp-wdma
- const: mediatek,mt8173-disp-wdma
reg:

View File

@@ -67,6 +67,7 @@ properties:
- items:
- enum:
- qcom,eliza-dp
- qcom,sm8750-dp
- const: qcom,sm8650-dp

View File

@@ -49,8 +49,13 @@ properties:
- items:
- enum:
- qcom,qcs8300-dsi-ctrl
- qcom,sc8280xp-dsi-ctrl
- const: qcom,sa8775p-dsi-ctrl
- const: qcom,mdss-dsi-ctrl
- items:
- const: qcom,eliza-dsi-ctrl
- const: qcom,sm8750-dsi-ctrl
- const: qcom,mdss-dsi-ctrl
- enum:
- qcom,dsi-ctrl-6g-qcm2290
- qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible

View File

@@ -91,6 +91,7 @@ allOf:
compatible:
contains:
enum:
- qcom,adreno-gmu-615.0
- qcom,adreno-gmu-618.0
- qcom,adreno-gmu-630.2
then:

View File

@@ -440,13 +440,6 @@ allOf:
clocks: false
clock-names: false
reg-names:
minItems: 1
items:
- const: kgsl_3d0_reg_memory
- const: cx_mem
- const: cx_dbgc
examples:
- |

View File

@@ -0,0 +1,494 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/qcom,eliza-mdss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Eliza SoC Display MDSS
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
description:
Eliza SoC Mobile Display Subsystem (MDSS) encapsulates sub-blocks like DPU
display controller, DSI and DP interfaces etc.
$ref: /schemas/display/msm/mdss-common.yaml#
properties:
compatible:
const: qcom,eliza-mdss
clocks:
items:
- description: Display AHB
- description: Display hf AXI
- description: Display core
iommus:
maxItems: 1
interconnects:
items:
- description: Interconnect path from mdp0 port to the data bus
- description: Interconnect path from CPU to the reg bus
interconnect-names:
items:
- const: mdp0-mem
- const: cpu-cfg
patternProperties:
"^display-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,eliza-dpu
"^displayport-controller@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,eliza-dp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,eliza-dsi-ctrl
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,eliza-dsi-phy-4nm
required:
- compatible
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/phy/phy-qcom-qmp.h>
#include <dt-bindings/power/qcom,rpmhpd.h>
display-subsystem@ae00000 {
compatible = "qcom,eliza-mdss";
reg = <0x0ae00000 0x1000>;
reg-names = "mdss";
ranges;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&disp_cc_mdss_ahb_clk>,
<&gcc_disp_hf_axi_clk>,
<&disp_cc_mdss_mdp_clk>;
resets = <&disp_cc_mdss_core_bcr>;
interconnects = <&mmss_noc_master_mdp QCOM_ICC_TAG_ALWAYS
&mc_virt_slave_ebi1 QCOM_ICC_TAG_ALWAYS>,
<&gem_noc_master_appss_proc QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc_slave_display_cfg QCOM_ICC_TAG_ACTIVE_ONLY>;
interconnect-names = "mdp0-mem",
"cpu-cfg";
power-domains = <&mdss_gdsc>;
iommus = <&apps_smmu 0x800 0x2>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
mdss_mdp: display-controller@ae01000 {
compatible = "qcom,eliza-dpu";
reg = <0x0ae01000 0x93000>,
<0x0aeb0000 0x2008>;
reg-names = "mdp",
"vbif";
interrupts-extended = <&mdss 0>;
clocks = <&gcc_disp_hf_axi_clk>,
<&disp_cc_mdss_ahb_clk>,
<&disp_cc_mdss_mdp_lut_clk>,
<&disp_cc_mdss_mdp_clk>,
<&disp_cc_mdss_vsync_clk>;
clock-names = "nrt_bus",
"iface",
"lut",
"core",
"vsync";
assigned-clocks = <&disp_cc_mdss_vsync_clk>;
assigned-clock-rates = <19200000>;
operating-points-v2 = <&mdp_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dpu_intf1_out: endpoint {
remote-endpoint = <&mdss_dsi0_in>;
};
};
port@1 {
reg = <1>;
dpu_intf2_out: endpoint {
remote-endpoint = <&mdss_dsi1_in>;
};
};
port@2 {
reg = <2>;
dpu_intf0_out: endpoint {
remote-endpoint = <&mdss_dp0_in>;
};
};
};
mdp_opp_table: opp-table {
compatible = "operating-points-v2";
opp-150000000 {
opp-hz = /bits/ 64 <150000000>;
required-opps = <&rpmhpd_opp_low_svs_d1>;
};
opp-207000000 {
opp-hz = /bits/ 64 <207000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-342000000 {
opp-hz = /bits/ 64 <342000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-417000000 {
opp-hz = /bits/ 64 <417000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-532000000 {
opp-hz = /bits/ 64 <532000000>;
required-opps = <&rpmhpd_opp_nom>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
required-opps = <&rpmhpd_opp_nom_l1>;
};
opp-660000000 {
opp-hz = /bits/ 64 <660000000>;
required-opps = <&rpmhpd_opp_turbo>;
};
};
};
dsi@ae94000 {
compatible = "qcom,eliza-dsi-ctrl", "qcom,sm8750-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0ae94000 0x400>;
reg-names = "dsi_ctrl";
interrupts-extended = <&mdss 4>;
clocks = <&disp_cc_mdss_byte0_clk>,
<&disp_cc_mdss_byte0_intf_clk>,
<&disp_cc_mdss_pclk0_clk>,
<&disp_cc_mdss_esc0_clk>,
<&disp_cc_mdss_ahb_clk>,
<&gcc_disp_hf_axi_clk>,
<&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
<&disp_cc_esync0_clk>,
<&disp_cc_osc_clk>,
<&disp_cc_mdss_byte0_clk_src>,
<&disp_cc_mdss_pclk0_clk_src>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus",
"dsi_pll_pixel",
"dsi_pll_byte",
"esync",
"osc",
"byte_src",
"pixel_src";
operating-points-v2 = <&mdss_dsi_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
phys = <&mdss_dsi0_phy>;
phy-names = "dsi";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss_dsi0_in: endpoint {
remote-endpoint = <&dpu_intf1_out>;
};
};
port@1 {
reg = <1>;
mdss_dsi0_out: endpoint {
remote-endpoint = <&panel0_in>;
data-lanes = <0 1 2 3>;
};
};
};
mdss_dsi_opp_table: opp-table {
compatible = "operating-points-v2";
opp-140630000 {
opp-hz = /bits/ 64 <140630000>;
required-opps = <&rpmhpd_opp_low_svs_d1>;
};
opp-187500000 {
opp-hz = /bits/ 64 <187500000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-358000000 {
opp-hz = /bits/ 64 <358000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
};
};
mdss_dsi0_phy: phy@ae95000 {
compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
reg = <0x0ae95000 0x200>,
<0x0ae95200 0x280>,
<0x0ae95500 0x400>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
clocks = <&disp_cc_mdss_ahb_clk>,
<&bi_tcxo_div2>;
clock-names = "iface",
"ref";
#clock-cells = <1>;
#phy-cells = <0>;
vdds-supply = <&vreg_l2b>;
};
dsi@ae96000 {
compatible = "qcom,eliza-dsi-ctrl", "qcom,sm8750-dsi-ctrl", "qcom,mdss-dsi-ctrl";
reg = <0x0ae96000 0x400>;
reg-names = "dsi_ctrl";
interrupts-extended = <&mdss 5>;
clocks = <&disp_cc_mdss_byte1_clk>,
<&disp_cc_mdss_byte1_intf_clk>,
<&disp_cc_mdss_pclk1_clk>,
<&disp_cc_mdss_esc1_clk>,
<&disp_cc_mdss_ahb_clk>,
<&gcc_disp_hf_axi_clk>,
<&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
<&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
<&disp_cc_esync1_clk>,
<&disp_cc_osc_clk>,
<&disp_cc_mdss_byte1_clk_src>,
<&disp_cc_mdss_pclk1_clk_src>;
clock-names = "byte",
"byte_intf",
"pixel",
"core",
"iface",
"bus",
"dsi_pll_pixel",
"dsi_pll_byte",
"esync",
"osc",
"byte_src",
"pixel_src";
operating-points-v2 = <&mdss_dsi_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
phys = <&mdss_dsi1_phy>;
phy-names = "dsi";
vdda-supply = <&vreg_l4b>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss_dsi1_in: endpoint {
remote-endpoint = <&dpu_intf2_out>;
};
};
port@1 {
reg = <1>;
mdss_dsi1_out: endpoint {
remote-endpoint = <&panel1_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
mdss_dsi1_phy: phy@ae97000 {
compatible = "qcom,eliza-dsi-phy-4nm", "qcom,sm8650-dsi-phy-4nm";
reg = <0x0ae97000 0x200>,
<0x0ae97200 0x280>,
<0x0ae97500 0x400>;
reg-names = "dsi_phy",
"dsi_phy_lane",
"dsi_pll";
clocks = <&disp_cc_mdss_ahb_clk>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface",
"ref";
#clock-cells = <1>;
#phy-cells = <0>;
vdds-supply = <&vreg_l2b>;
};
displayport-controller@af54000 {
compatible = "qcom,eliza-dp", "qcom,sm8650-dp";
reg = <0xaf54000 0x104>,
<0xaf54200 0xc0>,
<0xaf55000 0x770>,
<0xaf56000 0x9c>,
<0xaf57000 0x9c>;
interrupts-extended = <&mdss 12>;
clocks = <&disp_cc_mdss_ahb_clk>,
<&disp_cc_mdss_dptx0_aux_clk>,
<&disp_cc_mdss_dptx0_link_clk>,
<&disp_cc_mdss_dptx0_link_intf_clk>,
<&disp_cc_mdss_dptx0_pixel0_clk>,
<&disp_cc_mdss_dptx0_pixel1_clk>;
clock-names = "core_iface",
"core_aux",
"ctrl_link",
"ctrl_link_iface",
"stream_pixel",
"stream_1_pixel";
assigned-clocks = <&disp_cc_mdss_dptx0_link_clk_src>,
<&disp_cc_mdss_dptx0_pixel0_clk_src>,
<&disp_cc_mdss_dptx0_pixel1_clk_src>;
assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
operating-points-v2 = <&dp_opp_table>;
power-domains = <&rpmhpd RPMHPD_MMCX>;
phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>;
phy-names = "dp";
#sound-dai-cells = <0>;
dp_opp_table: opp-table {
compatible = "operating-points-v2";
opp-192000000 {
opp-hz = /bits/ 64 <192000000>;
required-opps = <&rpmhpd_opp_low_svs_d1>;
};
opp-270000000 {
opp-hz = /bits/ 64 <270000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-540000000 {
opp-hz = /bits/ 64 <540000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-810000000 {
opp-hz = /bits/ 64 <810000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mdss_dp0_in: endpoint {
remote-endpoint = <&dpu_intf0_out>;
};
};
port@1 {
reg = <1>;
mdss_dp0_out: endpoint {
data-lanes = <0 1 2 3>;
remote-endpoint = <&usb_dp_qmpphy_dp_in>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
};
};
};
};
};

View File

@@ -50,6 +50,22 @@ patternProperties:
- qcom,sc8280xp-dp
- qcom,sc8280xp-edp
"^dsi@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,sc8280xp-dsi-ctrl
"^phy@[0-9a-f]+$":
type: object
additionalProperties: true
properties:
compatible:
contains:
const: qcom,sc8280xp-dsi-phy-5nm
unevaluatedProperties: false
examples:
@@ -129,6 +145,20 @@ examples:
};
};
port@1 {
reg = <1>;
dpu_intf1_out: endpoint {
remote-endpoint = <&mdss0_dsi0_in>;
};
};
port@2 {
reg = <2>;
dpu_intf2_out: endpoint {
remote-endpoint = <&mdss0_dsi1_in>;
};
};
port@4 {
reg = <4>;
endpoint {

View File

@@ -15,6 +15,7 @@ properties:
compatible:
oneOf:
- enum:
- qcom,eliza-dpu
- qcom,glymur-dpu
- qcom,kaanapali-dpu
- qcom,sa8775p-dpu

View File

@@ -20,11 +20,6 @@ properties:
reg:
maxItems: 1
backlight: true
port: true
power-supply: true
reset-gpios: true
required:
- compatible
- reg

View File

@@ -41,8 +41,6 @@ properties:
panel-timing: true
port: true
additionalProperties: false
required:
- compatible
- data-mapping
@@ -51,6 +49,8 @@ required:
- panel-timing
- port
additionalProperties: false
examples:
- |+
panel {

View File

@@ -56,8 +56,6 @@ properties:
- port@0
- port@1
additionalProperties: false
required:
- compatible
- width-mm
@@ -65,6 +63,8 @@ required:
- data-mapping
- panel-timing
additionalProperties: false
examples:
- |+
panel-lvds {

View File

@@ -22,10 +22,10 @@ properties:
enable-gpios: true
port: true
additionalProperties: false
required:
- compatible
- power-supply
additionalProperties: false
...

View File

@@ -22,10 +22,10 @@ properties:
backlight: true
port: true
additionalProperties: false
required:
- compatible
- power-supply
additionalProperties: false
...

View File

@@ -28,7 +28,6 @@ properties:
port: true
reset-gpios: true
backlight: true
required:

View File

@@ -20,6 +20,8 @@ properties:
- boe,nv110wum-l60
# CSOT pna957qt1-1 10.95" WUXGA TFT LCD panel
- csot,pna957qt1-1
# Holitech HTF065H045 6.517" 720x1600 TFT LCD panel
- holitech,htf065h045
# IVO t109nw41 11.0" WUXGA TFT LCD panel
- ivo,t109nw41
# KINGDISPLAY KD110N11-51IE 10.95" WUXGA TFT LCD panel

View File

@@ -33,8 +33,6 @@ properties:
vsp-supply:
description: Negative source voltage rail
port: true
required:
- compatible
- reg

View File

@@ -0,0 +1,91 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/himax,hx83121a.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Himax HX83121A based DSI display Panels
maintainers:
- Pengyu Luo <mitltlatltl@gmail.com>
description:
The Himax HX83121A is a generic DSI Panel IC used to drive dsi
panels. Support video mode panels from China Star Optoelectronics
Technology (CSOT) and BOE Technology.
allOf:
- $ref: panel-common-dual.yaml#
properties:
compatible:
items:
- enum:
- boe,ppc357db1-4
- csot,ppc357db1-4
- const: himax,hx83121a
reg:
maxItems: 1
reset-gpios:
maxItems: 1
avdd-supply:
description: analog positive supply for IC
avee-supply:
description: analog negative supply for IC
vddi-supply:
description: power supply for IC
backlight: true
ports: true
required:
- compatible
- reg
- vddi-supply
- reset-gpios
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "csot,ppc357db1-4", "himax,hx83121a";
reg = <0>;
vddi-supply = <&vreg_l2b>;
reset-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_0: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1{
reg = <1>;
panel_in_1: endpoint {
remote-endpoint = <&dsi1_out>;
};
};
};
};
};
...

View File

@@ -33,11 +33,8 @@ properties:
maxItems: 1
reset-gpios: true
backlight: true
rotation: true
port: true
vcc-supply:
@@ -54,8 +51,6 @@ required:
- vcc-supply
- iovcc-supply
additionalProperties: false
allOf:
- $ref: panel-common.yaml#
- if:
@@ -68,6 +63,8 @@ allOf:
required:
- reset-gpios
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>

View File

@@ -34,10 +34,6 @@ properties:
maxItems: 1
description: Display data/command selection (D/CX)
backlight: true
reset-gpios: true
rotation: true
required:
- compatible
- reg

View File

@@ -29,9 +29,6 @@ properties:
reg:
maxItems: 1
reset-gpios: true
port: true
vcc-supply:
description: Core voltage supply

View File

@@ -40,8 +40,6 @@ properties:
spi-max-frequency:
const: 10000000
port: true
vci-supply:
description: Analog voltage supply (2.5 .. 3.3V)
@@ -51,8 +49,6 @@ properties:
vddi-led-supply:
description: Voltage supply for the LED driver (1.65 .. 3.3 V)
unevaluatedProperties: false
required:
- compatible
- reg
@@ -68,6 +64,8 @@ then:
required:
- port
unevaluatedProperties: false
examples:
- |+
#include <dt-bindings/gpio/gpio.h>

View File

@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/display/panel/ilitek,ili9806e.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ilitek ILI9806E based MIPI-DSI panels
title: Ilitek ILI9806E based panels
maintainers:
- Michael Walle <mwalle@kernel.org>
@@ -18,6 +18,7 @@ properties:
- enum:
- densitron,dmt028vghmcmi-1d
- ortustech,com35h3p70ulc
- rocktech,rk050hr345-ct106a
- const: ilitek,ili9806e
reg:
@@ -30,11 +31,24 @@ required:
- compatible
- reg
- vdd-supply
- vccio-supply
- reset-gpios
- backlight
- port
if:
properties:
compatible:
contains:
enum:
- rocktech,rk050hr345-ct106a
then:
$ref: /schemas/spi/spi-peripheral-props.yaml#
required:
- spi-max-frequency
else:
required:
- vccio-supply
unevaluatedProperties: false
examples:
@@ -60,5 +74,25 @@ examples:
};
};
};
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "rocktech,rk050hr345-ct106a", "ilitek,ili9806e";
reg = <0>;
vdd-supply = <&reg_vdd_panel>;
spi-max-frequency = <10000000>;
reset-gpios = <&gpiob 6 GPIO_ACTIVE_LOW>;
backlight = <&backlight>;
port {
panel_in_rgb: endpoint {
remote-endpoint = <&ltdc_out_rgb>;
};
};
};
};
...

View File

@@ -20,11 +20,6 @@ properties:
reg:
maxItems: 1
backlight: true
port: true
power-supply: true
reset-gpios: true
required:
- compatible
- reg

View File

@@ -10,7 +10,7 @@ maintainers:
- Lin Huang <hl@rock-chips.com>
allOf:
- $ref: panel-common.yaml#
- $ref: panel-common-dual.yaml#
properties:
compatible:
@@ -28,6 +28,9 @@ properties:
avee-supply:
description: The regulator that provides negative voltage
port: true
ports: true
required:
- compatible
- reg
@@ -52,6 +55,27 @@ examples:
avee-supply = <&avee>;
backlight = <&backlight>;
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
mipi_in_panel: endpoint {
remote-endpoint = <&mipi_out_panel>;
};
};
port@1 {
reg = <1>;
mipi1_in_panel: endpoint {
remote-endpoint = <&mipi1_out_panel>;
};
};
};
};
};

View File

@@ -23,6 +23,7 @@ properties:
- melfas,lmfbx101117480
- radxa,display-10hd-ad001
- radxa,display-8hd-ad002
- taiguanck,xti05101-01a
- const: jadard,jd9365da-h3
reg:
@@ -35,9 +36,8 @@ properties:
description: supply regulator for VCCIO, usually 1.8V
reset-gpios: true
backlight: true
rotation: true
port: true
required:

View File

@@ -20,11 +20,6 @@ properties:
reg:
maxItems: 1
backlight: true
port: true
power-supply: true
reset-gpios: true
spi-3wire: true
required:

View File

@@ -25,6 +25,7 @@ properties:
backlight: true
port: true
reset-gpios: true
iovcc-supply:
description: regulator that supplies the iovcc voltage
vci-supply:

View File

@@ -24,6 +24,7 @@ properties:
backlight: true
port: true
reset-gpios: true
iovcc-supply:
description: regulator that supplies the iovcc voltage
vcc-supply:

View File

@@ -20,10 +20,6 @@ properties:
reg:
maxItems: 1
label: true
enable-gpios: true
port: true
spi-cpha: true
spi-cpol: true

View File

@@ -0,0 +1,64 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/lxd,m9189a.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: LXD M9189A DSI Display Panel
maintainers:
- Michael Tretter <m.tretter@pengutronix.de>
allOf:
- $ref: panel-common.yaml
properties:
compatible:
const: lxd,m9189a
reg:
maxItems: 1
standby-gpios:
description: GPIO used for the standby pin
maxItems: 1
reset-gpios: true
power-supply: true
backlight: true
port: true
required:
- compatible
- reg
- standby-gpios
- reset-gpios
- power-supply
- backlight
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "lxd,m9189a";
reg = <0>;
backlight = <&backlight>;
reset-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
standby-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
power-supply = <&reg_display_3v3>;
port {
mipi_panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
};

View File

@@ -22,7 +22,6 @@ properties:
- mantix,mlaf057we51-x
- ys,ys57pss36bh5gq
port: true
reg:
maxItems: 1
description: DSI virtual channel
@@ -36,13 +35,13 @@ properties:
vddi-supply:
description: 1.8V I/O voltage supply
reset-gpios: true
mantix,tp-rstn-gpios:
maxItems: 1
description: second reset line that triggers DSI config load
backlight: true
port: true
reset-gpios: true
required:
- compatible

View File

@@ -47,8 +47,6 @@ properties:
panel-timing: true
port: true
additionalProperties: false
required:
- compatible
- data-mapping
@@ -57,6 +55,8 @@ required:
- panel-timing
- port
additionalProperties: false
examples:
- |+

View File

@@ -44,8 +44,6 @@ properties:
panel-timing: true
port: true
additionalProperties: false
required:
- compatible
- vcc-supply
@@ -55,6 +53,8 @@ required:
- panel-timing
- port
additionalProperties: false
examples:
- |+
panel {

View File

@@ -0,0 +1,69 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/panel/motorola,mot-panel.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Atrix 4G and Droid X2 DSI Display Panel
maintainers:
- Svyatoslav Ryhel <clamor95@gmail.com>
description:
Atrix 4G and Droid X2 use the same 540x960 DSI video mode panel. Exact
panel vendor and model are unknown hence generic compatible based on the
board name "Mot" is used.
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
items:
- const: motorola,mot-panel
reg:
maxItems: 1
vdd-supply:
description: Regulator for main power supply.
vddio-supply:
description: Regulator for 1.8V IO power supply.
backlight: true
reset-gpios: true
port: true
required:
- compatible
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
dsi {
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "motorola,mot-panel";
reg = <0>;
reset-gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
vdd-supply = <&vdd_5v0_panel>;
vddio-supply = <&vdd_1v8_vio>;
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
...

View File

@@ -24,10 +24,6 @@ properties:
reg:
maxItems: 1
label: true
port: true
reset-gpios: true
spi-max-frequency:
maximum: 10000000

View File

@@ -28,13 +28,14 @@ properties:
reg:
maxItems: 1
reset-gpios: true
vdd-supply:
description: regulator that supplies the vdd voltage
vddi-supply:
description: regulator that supplies the vddi voltage
backlight: true
port: true
reset-gpios: true
required:
- compatible

View File

@@ -37,9 +37,6 @@ properties:
vddio-supply:
description: regulator that supplies the I/O voltage
rotation: true
backlight: true
required:
- compatible
- reg

View File

@@ -47,9 +47,6 @@ properties:
vddneg-supply:
description: phandle of the negative boost supply regulator
port: true
backlight: true
required:
- compatible
- reg

View File

@@ -31,12 +31,12 @@ properties:
reset-gpios:
maxItems: 1
additionalProperties: false
required:
- compatible
- reg
additionalProperties: false
examples:
- |
dsi {

View File

@@ -44,6 +44,8 @@ properties:
- boe,nv133fhm-n62
# BOE NV140FHM-N49 14.0" FHD a-Si FT panel
- boe,nv140fhmn49
# FriendlyELEC HD702E 800x1280 LCD panel
- friendlyarm,hd702e
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
- innolux,n116bca-ea1
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel

View File

@@ -58,6 +58,10 @@ properties:
- hydis,hv070wx2-1e0
# Jenson Display BL-JT60050-01A 7" WSVGA (1024x600) color TFT LCD LVDS panel
- jenson,bl-jt60050-01a
# Samsung LTN070NL01 7.0" WSVGA (1024x600) TFT LCD LVDS panel
- samsung,ltn070nl01
# Samsung LTN101AL03 10.1" WXGA (800x1280) TFT LCD LVDS panel
- samsung,ltn101al03
- tbs,a711-panel
# Winstar WF70A8SYJHLNGA 7" WSVGA (1024x600) color TFT LCD LVDS panel
- winstar,wf70a8syjhlnga

View File

@@ -49,6 +49,8 @@ properties:
- lg,lh500wx1-sd03
# Lincoln LCD197 5" 1080x1920 LCD panel
- lincolntech,lcd197
# Novatek NT37700F 1080x2160 AMOLED panel
- novatek,nt37700f
# One Stop Displays OSD101T2587-53TS 10.1" 1920x1200 panel
- osddisplays,osd101t2587-53ts
# Panasonic 10" WUXGA TFT LCD panel

View File

@@ -103,6 +103,8 @@ properties:
- dlc,dlc1010gig
# Emerging Display Technology Corp. 3.5" QVGA TFT LCD panel
- edt,et035012dm6
# Emerging Display Technology Corp. 5.7" 24-bit VGA TFT LCD panel
- edt,et057023udba
# Emerging Display Technology Corp. 5.7" VGA TFT LCD panel
- edt,et057090dhu
- edt,et070080dh6
@@ -144,8 +146,6 @@ properties:
- foxlink,fl500wvr00-a0t
# Frida FRD350H54004 3.5" QVGA TFT LCD panel
- frida,frd350h54004
# FriendlyELEC HD702E 800x1280 LCD panel
- friendlyarm,hd702e
# GiantPlus GPG48273QS5 4.3" (480x272) WQVGA TFT LCD panel
- giantplus,gpg48273qs5
# GiantPlus GPM940B0 3.0" QVGA TFT LCD panel
@@ -188,6 +188,8 @@ properties:
- innolux,n156bge-l21
# Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel
- innolux,zj070na-01p
# JuTouch Technology Co.. 7" JT070TM041 WSVGA (1024 x 600) LVDS panel
- jutouch,jt070tm041
# JuTouch Technology Co.. 10" JT101TM023 WXGA (1280 x 800) LVDS panel
- jutouch,jt101tm023
# Kaohsiung Opto-Electronics Inc. 5.7" QVGA (320 x 240) TFT LCD panel
@@ -268,6 +270,8 @@ properties:
- powertip,ph128800t006-zhc01
# POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel
- powertip,ph800480t013-idf02
# POWERTIP PH800480T032-ZHC19 7.0" WVGA TFT LCD panel
- powertip,ph800480t032-zhc19
# PrimeView PM070WL4 7.0" 800x480 TFT LCD panel
- primeview,pm070wl4
# QiaoDian XianShi Corporation 4"3 TFT LCD panel
@@ -308,6 +312,8 @@ properties:
- team-source-display,tst043015cmhx
# Tianma Micro-electronics P0700WXF1MBAA 7.0" WXGA (1280x800) LVDS TFT LCD panel
- tianma,p0700wxf1mbaa
# Tianma Micro-electronics TM050RDH03 5.0" WVGA TFT LCD panel
- tianma,tm050rdh03
# Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel
- tianma,tm070jdhg30
# Tianma Micro-electronics TM070JDHG34-00 7.0" WXGA (1280x800) LVDS TFT LCD panel

View File

@@ -21,11 +21,11 @@ properties:
backlight: true
port: true
additionalProperties: false
required:
- compatible
- power-supply
- backlight
additionalProperties: false
...

View File

@@ -33,13 +33,13 @@ properties:
reset-gpios:
maxItems: 1
additionalProperties: false
required:
- compatible
- power-supply
- reg
additionalProperties: false
examples:
- |
dsi {

View File

@@ -34,8 +34,6 @@ properties:
vddio-supply:
description: I/O voltage rail
port: true
required:
- compatible
- reg

View File

@@ -33,8 +33,6 @@ properties:
iovcc-supply:
description: Regulator for 1.8V IO power supply.
backlight: true
renesas,gamma:
$ref: /schemas/types.yaml#/definitions/uint32
description:
@@ -51,6 +49,7 @@ properties:
type: boolean
description: digital contrast adjustment
backlight: true
reset-gpios: true
port: true

View File

@@ -33,7 +33,6 @@ properties:
description: Regulator for 1.8V IO power supply.
backlight: true
reset-gpios: true
port: true

View File

@@ -33,7 +33,6 @@ properties:
# Xingbangda XBD599 5.99" 720x1440 TFT LCD panel
- xingbangda,xbd599
port: true
reg:
maxItems: 1
description: DSI virtual channel
@@ -44,9 +43,9 @@ properties:
iovcc-supply:
description: I/O voltage supply
reset-gpios: true
backlight: true
port: true
reset-gpios: true
rotation: true
required:

View File

@@ -43,13 +43,13 @@ properties:
no-hpd: true
hpd-gpios: true
additionalProperties: false
required:
- compatible
- enable-gpios
- power-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>

View File

@@ -20,10 +20,6 @@ properties:
reg:
maxItems: 1
display-timings: true
port: true
reset-gpios: true
vdd3-supply:
description: core voltage supply

View File

@@ -31,8 +31,6 @@ properties:
configuration.
maxItems: 1
reset-gpios: true
vci-supply:
description: regulator that supplies the VCI analog voltage
usually around 3.0 V
@@ -41,8 +39,6 @@ properties:
description: regulator that supplies the VCCIO voltage usually
around 1.8 V
backlight: true
spi-cpha: true
spi-cpol: true
@@ -50,8 +46,6 @@ properties:
spi-max-frequency:
maximum: 1200000
port: true
required:
- compatible
- reg

View File

@@ -23,8 +23,6 @@ properties:
reg:
maxItems: 1
reset-gpios: true
vci-supply:
description: regulator that supplies the VCI analog voltage
usually around 3.0 V
@@ -33,8 +31,6 @@ properties:
description: regulator that supplies the VCCIO voltage usually
around 1.8 V
backlight: true
spi-cpha: true
spi-cpol: true
@@ -44,8 +40,6 @@ properties:
maximum 300 ns minimum cycle which gives around 3 MHz max frequency
maximum: 3000000
port: true
required:
- compatible
- reg

View File

@@ -30,8 +30,6 @@ properties:
configuration.
maxItems: 1
reset-gpios: true
vci-supply:
description: regulator that supplies the VCI analog voltage
usually around 3.0 V
@@ -40,8 +38,6 @@ properties:
description: regulator that supplies the VCCIO voltage usually
around 1.8 V
backlight: true
spi-cpha: true
spi-cpol: true
@@ -49,8 +45,6 @@ properties:
spi-max-frequency:
maximum: 1200000
port: true
required:
- compatible
- reg

View File

@@ -44,6 +44,8 @@ properties:
vmipi-supply:
description: VMIPI supply, usually 1.8v.
port: true
required:
- compatible
- reg
@@ -65,6 +67,12 @@ examples:
power-supply = <&display_3v3_supply>;
reset-gpios = <&gpf0 4 GPIO_ACTIVE_LOW>;
backlight = <&backlight>;
port {
panel_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
};

View File

@@ -22,10 +22,6 @@ properties:
reg:
maxItems: 1
reset-gpios: true
port: true
vdd3-supply:
description: VDD regulator

View File

@@ -21,8 +21,6 @@ properties:
reg:
maxItems: 1
reset-gpios: true
port: true
default-brightness: true
max-brightness: true

View File

@@ -8,13 +8,16 @@ title: Samsung AMS561RA01 panel with S6E8AA5X01 controller
maintainers:
- Kaustabh Chakraborty <kauschluss@disroot.org>
- Yedaya Katsman <yedaya.ka@gmail.com>
allOf:
- $ref: panel-common.yaml#
properties:
compatible:
const: samsung,s6e8aa5x01-ams561ra01
enum:
- samsung,s6e8aa5x01-ams561ra01
- samsung,s6e8fc0-m1906f9
reg:
maxItems: 1

View File

@@ -41,8 +41,6 @@ properties:
panel-timing: true
port: true
additionalProperties: false
required:
- compatible
- port
@@ -51,6 +49,8 @@ required:
- height-mm
- panel-timing
additionalProperties: false
examples:
- |+
panel {

View File

@@ -49,12 +49,6 @@ properties:
If not set, the controller is in 3-line SPI mode.
Disallowed for DSI.
port: true
reset-gpios: true
rotation: true
backlight: true
required:
- compatible
- reg

View File

@@ -24,12 +24,6 @@ properties:
reg:
maxItems: 1
reset-gpios: true
power-supply: true
backlight: true
port: true
rotation: true
spi-cpha: true
spi-cpol: true

View File

@@ -20,10 +20,6 @@ properties:
reg:
maxItems: 1
label: true
reset-gpios: true
port: true
required:
- compatible
- port

View File

@@ -31,9 +31,7 @@ properties:
description: Negative 5V supply
reset-gpios: true
enable-gpios: true
port: true
required:

View File

@@ -16,8 +16,6 @@ properties:
compatible:
const: startek,kd070fhfid015
enable-gpios: true
iovcc-supply:
description: Reference to the regulator powering the panel IO pins.
@@ -25,13 +23,10 @@ properties:
maxItems: 1
description: DSI virtual channel
reset-gpios: true
enable-gpios: true
port: true
power-supply: true
additionalProperties: false
reset-gpios: true
required:
- compatible
@@ -42,6 +37,8 @@ required:
- port
- power-supply
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>

View File

@@ -25,11 +25,6 @@ properties:
reg:
maxItems: 1
label: true
reset-gpios: true
backlight: true
port: true
spi-cpha: true
spi-cpol: true

View File

@@ -25,8 +25,6 @@ properties:
port: true
reset-gpios: true
additionalProperties: false
required:
- compatible
- reg
@@ -35,6 +33,8 @@ required:
- reset-gpios
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>

View File

@@ -36,8 +36,6 @@ properties:
port: true
reset-gpios: true
additionalProperties: false
required:
- compatible
- reg
@@ -46,6 +44,8 @@ required:
- reset-gpios
- port
additionalProperties: false
examples:
- |
dsi {

View File

@@ -26,8 +26,6 @@ properties:
port: true
reset-gpios: true
additionalProperties: false
required:
- compatible
- reg
@@ -37,6 +35,8 @@ required:
- reset-gpios
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>

View File

@@ -27,12 +27,10 @@ description: |
* Pixel clock up to 594MHz
* I2S, SPDIF audio interface
allOf:
- $ref: /schemas/sound/dai-common.yaml#
properties:
compatible:
enum:
- rockchip,rk3576-dp
- rockchip,rk3588-dp
reg:
@@ -42,6 +40,7 @@ properties:
maxItems: 1
clocks:
minItems: 3
items:
- description: Peripheral/APB bus clock
- description: DisplayPort AUX clock
@@ -50,6 +49,7 @@ properties:
- description: SPDIF interfce clock
clock-names:
minItems: 3
items:
- const: apb
- const: aux
@@ -95,6 +95,27 @@ required:
- ports
- resets
allOf:
- $ref: /schemas/sound/dai-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- rockchip,rk3588-dp
then:
properties:
clocks:
minItems: 5
clock-names:
minItems: 5
else:
properties:
clocks:
maxItems: 3
clock-names:
maxItems: 3
unevaluatedProperties: false
examples:

View File

@@ -1,4 +1,5 @@
Device-Tree bindings for tilcdc DRM generic panel output driver
This binding is deprecated and should not be used.
Required properties:
- compatible: value should be "ti,tilcdc,panel".

View File

@@ -0,0 +1,100 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2025 Bootlin
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/tilcdc/ti,am33xx-tilcdc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI LCD Controller, found on AM335x, DA850, AM18x and OMAP-L138
maintainers:
- Kory Maincent <kory.maincent@bootlin.com>
properties:
compatible:
enum:
- ti,am33xx-tilcdc
- ti,da850-tilcdc
reg:
maxItems: 1
interrupts:
maxItems: 1
port:
$ref: /schemas/graph.yaml#/properties/port
ti,hwmods:
$ref: /schemas/types.yaml#/definitions/string
description:
Name of the hwmod associated to the LCDC
max-bandwidth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The maximum pixels per second that the memory interface / lcd
controller combination can sustain
# maximum: 2048*2048*60
maximum: 251658240
max-width:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The maximum horizontal pixel width supported by the lcd controller.
maximum: 2048
max-pixelclock:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The maximum pixel clock that can be supported by the lcd controller
in KHz.
blue-and-red-wiring:
enum: [straight, crossed]
description:
This property deals with the LCDC revision 2 (found on AM335x)
color errata [1].
- "straight" indicates normal wiring that supports RGB565,
BGR888, and XBGR8888 color formats.
- "crossed" indicates wiring that has blue and red wires
crossed. This setup supports BGR565, RGB888 and XRGB8888
formats.
- If the property is not present or its value is not recognized
the legacy mode is assumed. This configuration supports RGB565,
RGB888 and XRGB8888 formats. However, depending on wiring, the red
and blue colors are swapped in either 16 or 24-bit color modes.
[1] There is an errata about AM335x color wiring. For 16-bit color
mode the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]),
but for 24 bit color modes the wiring of blue and red components is
crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is
for Blue[3-7]. For more details see section 3.1.1 in AM335x
Silicon Errata
https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360
required:
- compatible
- interrupts
- reg
- port
additionalProperties: false
examples:
- |
display-controller@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
blue-and-red-wiring = "crossed";
port {
endpoint {
remote-endpoint = <&hdmi_0>;
};
};
};

View File

@@ -1,82 +0,0 @@
Device-Tree bindings for tilcdc DRM driver
Required properties:
- compatible: value should be one of the following:
- "ti,am33xx-tilcdc" for AM335x based boards
- "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
- interrupts: the interrupt number
- reg: base address and size of the LCDC device
Recommended properties:
- ti,hwmods: Name of the hwmod associated to the LCDC
Optional properties:
- max-bandwidth: The maximum pixels per second that the memory
interface / lcd controller combination can sustain
- max-width: The maximum horizontal pixel width supported by
the lcd controller.
- max-pixelclock: The maximum pixel clock that can be supported
by the lcd controller in KHz.
- blue-and-red-wiring: Recognized values "straight" or "crossed".
This property deals with the LCDC revision 2 (found on AM335x)
color errata [1].
- "straight" indicates normal wiring that supports RGB565,
BGR888, and XBGR8888 color formats.
- "crossed" indicates wiring that has blue and red wires
crossed. This setup supports BGR565, RGB888 and XRGB8888
formats.
- If the property is not present or its value is not recognized
the legacy mode is assumed. This configuration supports RGB565,
RGB888 and XRGB8888 formats. However, depending on wiring, the red
and blue colors are swapped in either 16 or 24-bit color modes.
Optional nodes:
- port/ports: to describe a connection to an external encoder. The
binding follows Documentation/devicetree/bindings/graph.txt and
supports a single port with a single endpoint.
- See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and
Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for connecting
tfp410 DVI encoder or lcd panel to lcdc
[1] There is an errata about AM335x color wiring. For 16-bit color mode
the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]),
but for 24 bit color modes the wiring of blue and red components is
crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is
for Blue[3-7]. For more details see section 3.1.1 in AM335x
Silicon Errata:
https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360
Example:
fb: fb@4830e000 {
compatible = "ti,am33xx-tilcdc", "ti,da850-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
blue-and-red-wiring = "crossed";
port {
lcdc_0: endpoint {
remote-endpoint = <&hdmi_0>;
};
};
};
tda19988: tda19988 {
compatible = "nxp,tda998x";
reg = <0x70>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
port {
hdmi_0: endpoint {
remote-endpoint = <&lcdc_0>;
};
};
};

View File

@@ -0,0 +1,122 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/verisilicon,dc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Verisilicon DC-series display controllers
maintainers:
- Icenowy Zheng <uwu@icenowy.me>
properties:
$nodename:
pattern: "^display@[0-9a-f]+$"
compatible:
items:
- enum:
- thead,th1520-dc8200
- const: verisilicon,dc # DC IPs have discoverable ID/revision registers
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: DC Core clock
- description: DMA AXI bus clock
- description: Configuration AHB bus clock
- description: Pixel clock of output 0
- description: Pixel clock of output 1
clock-names:
items:
- const: core
- const: axi
- const: ahb
- const: pix0
- const: pix1
resets:
items:
- description: DC Core reset
- description: DMA AXI bus reset
- description: Configuration AHB bus reset
reset-names:
items:
- const: core
- const: axi
- const: ahb
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: The first output channel , endpoint 0 should be
used for DPI format output and endpoint 1 should be used
for DP format output.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description: The second output channel if the DC variant
supports. Follow the same endpoint addressing rule with
the first port.
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/thead,th1520-clk-ap.h>
#include <dt-bindings/reset/thead,th1520-reset.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
display@ffef600000 {
compatible = "thead,th1520-dc8200", "verisilicon,dc";
reg = <0xff 0xef600000 0x0 0x100000>;
interrupts = <93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_vo CLK_DPU_CCLK>,
<&clk_vo CLK_DPU_ACLK>,
<&clk_vo CLK_DPU_HCLK>,
<&clk_vo CLK_DPU_PIXELCLK0>,
<&clk_vo CLK_DPU_PIXELCLK1>;
clock-names = "core", "axi", "ahb", "pix0", "pix1";
resets = <&rst TH1520_RESET_ID_DPU_CORE>,
<&rst TH1520_RESET_ID_DPU_AXI>,
<&rst TH1520_RESET_ID_DPU_AHB>;
reset-names = "core", "axi", "ahb";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
dpu_out_dp1: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_in>;
};
};
};
};
};

View File

@@ -23,6 +23,7 @@ properties:
- items:
- enum:
- mediatek,mt7623-mipi-tx
- mediatek,mt8167-mipi-tx
- const: mediatek,mt2701-mipi-tx
- items:
- enum:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-10nm.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-10nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 10nm PHY
@@ -10,7 +10,7 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#
- $ref: qcom,dsi-phy-common.yaml#
properties:
compatible:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-14nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 14nm PHY
@@ -10,7 +10,7 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#
- $ref: qcom,dsi-phy-common.yaml#
properties:
compatible:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-20nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 20nm PHY
@@ -10,7 +10,7 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#
- $ref: qcom,dsi-phy-common.yaml#
properties:
compatible:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-28nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 28nm PHY
@@ -10,7 +10,7 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#
- $ref: qcom,dsi-phy-common.yaml#
properties:
compatible:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-7nm.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-7nm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 7nm PHY
@@ -10,7 +10,7 @@ maintainers:
- Jonathan Marek <jonathan@marek.ca>
allOf:
- $ref: dsi-phy-common.yaml#
- $ref: qcom,dsi-phy-common.yaml#
properties:
compatible:
@@ -29,9 +29,14 @@ properties:
- qcom,sm8550-dsi-phy-4nm
- qcom,sm8650-dsi-phy-4nm
- qcom,sm8750-dsi-phy-3nm
- items:
- enum:
- qcom,eliza-dsi-phy-4nm
- const: qcom,sm8650-dsi-phy-4nm
- items:
- enum:
- qcom,qcs8300-dsi-phy-5nm
- qcom,sc8280xp-dsi-phy-5nm
- const: qcom,sa8775p-dsi-phy-5nm
reg:

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/dsi-phy-common.yaml#
$id: http://devicetree.org/schemas/phy/qcom,dsi-phy-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI PHY Common Properties

View File

@@ -172,6 +172,8 @@ patternProperties:
description: ARM Ltd.
"^armadeus,.*":
description: ARMadeus Systems SARL
"^armchina,.*":
description: Arm Technology (China) Co., Ltd.
"^armsom,.*":
description: ArmSoM Technology Co., Ltd.
"^arrow,.*":
@@ -441,6 +443,8 @@ patternProperties:
description: D-Link Corporation
"^dmo,.*":
description: Data Modul AG
"^doestek,.*":
description: Doestek Co., Ltd.
"^domintech,.*":
description: Domintech Co., Ltd.
"^dongwoon,.*":
@@ -709,6 +713,8 @@ patternProperties:
description: Hitex Development Tools
"^hitron,.*":
description: HiTRON Electronics Corporation
"^holitech,.*":
description: Jiangxi Holitech Technology Co., Ltd.
"^holt,.*":
description: Holt Integrated Circuits, Inc.
"^holtek,.*":
@@ -973,6 +979,8 @@ patternProperties:
description: Liebherr-Werk Nenzing GmbH
"^lxa,.*":
description: Linux Automation GmbH
"^lxd,.*":
description: LXD Research & Display, LLC
"^m5stack,.*":
description: M5Stack
"^macnica,.*":
@@ -1610,6 +1618,8 @@ patternProperties:
"^synopsys,.*":
description: Synopsys, Inc. (deprecated, use snps)
deprecated: true
"^taiguanck,.*":
description: Shenzhen Top Group Technology Co., Ltd.
"^taos,.*":
description: Texas Advanced Optoelectronic Solutions Inc.
"^tbs,.*":
@@ -1761,6 +1771,8 @@ patternProperties:
description: Variscite Ltd.
"^vdl,.*":
description: Van der Laan b.v.
"^verisilicon,.*":
description: VeriSilicon Microelectronics (Shanghai) Co., Ltd.
"^vertexcom,.*":
description: Vertexcom Technologies, Inc.
"^via,.*":

View File

@@ -1101,6 +1101,8 @@ Example output. You may not have all of these fields.
CmaFree: 0 kB
Unaccepted: 0 kB
Balloon: 0 kB
GPUActive: 0 kB
GPUReclaim: 0 kB
HugePages_Total: 0
HugePages_Free: 0
HugePages_Rsvd: 0
@@ -1281,6 +1283,12 @@ Unaccepted
Memory that has not been accepted by the guest
Balloon
Memory returned to Host by VM Balloon Drivers
GPUActive
System memory allocated to active GPU objects
GPUReclaim
System memory stored in GPU pools for reuse. This memory is not
counted in GPUActive. It is shrinker reclaimable memory kept in a reuse
pool because it has non-standard page table attributes, like WC or UC.
HugePages_Total, HugePages_Free, HugePages_Rsvd, HugePages_Surp, Hugepagesize, Hugetlb
See Documentation/admin-guide/mm/hugetlbpage.rst.
DirectMap4k, DirectMap2M, DirectMap1G

View File

@@ -104,18 +104,6 @@ VBLANK Helper Reference
.. kernel-doc:: drivers/gpu/drm/drm_vblank_helper.c
:export:
Simple KMS Helper Reference
===========================
.. kernel-doc:: drivers/gpu/drm/drm_simple_kms_helper.c
:doc: overview
.. kernel-doc:: include/drm/drm_simple_kms_helper.h
:internal:
.. kernel-doc:: drivers/gpu/drm/drm_simple_kms_helper.c
:export:
fbdev Helper Functions Reference
================================

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