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Merge tag 'net-next-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Browse Source 
Pull networking updates from Jakub Kicinski:
 "Core & protocols:

   - Support HW queue leasing, allowing containers to be granted access
     to HW queues for zero-copy operations and AF_XDP

   - Number of code moves to help the compiler with inlining. Avoid
     output arguments for returning drop reason where possible

   - Rework drop handling within qdiscs to include more metadata about
     the reason and dropping qdisc in the tracepoints

   - Remove the rtnl_lock use from IP Multicast Routing

   - Pack size information into the Rx Flow Steering table pointer
     itself. This allows making the table itself a flat array of u32s,
     thus making the table allocation size a power of two

   - Report TCP delayed ack timer information via socket diag

   - Add ip_local_port_step_width sysctl to allow distributing the
     randomly selected ports more evenly throughout the allowed space

   - Add support for per-route tunsrc in IPv6 segment routing

   - Start work of switching sockopt handling to iov_iter

   - Improve dynamic recvbuf sizing in MPTCP, limit burstiness and avoid
     buffer size drifting up

   - Support MSG_EOR in MPTCP

   - Add stp_mode attribute to the bridge driver for STP mode selection.
     This addresses concerns about call_usermodehelper() usage

   - Remove UDP-Lite support (as announced in 2023)

   - Remove support for building IPv6 as a module. Remove the now
     unnecessary function calling indirection

  Cross-tree stuff:

   - Move Michael MIC code from generic crypto into wireless, it's
     considered insecure but some WiFi networks still need it

  Netfilter:

   - Switch nft_fib_ipv6 module to no longer need temporary dst_entry
     object allocations by using fib6_lookup() + RCU.

     Florian W reports this gets us ~13% higher packet rate

   - Convert IPVS's global __ip_vs_mutex to per-net service_mutex and
     switch the service tables to be per-net. Convert some code that
     walks the service lists to use RCU instead of the service_mutex

   - Add more opinionated input validation to lower security exposure

   - Make IPVS hash tables to be per-netns and resizable

  Wireless:

   - Finished assoc frame encryption/EPPKE/802.1X-over-auth

   - Radar detection improvements

   - Add 6 GHz incumbent signal detection APIs

   - Multi-link support for FILS, probe response templates and client
     probing

   - New APIs and mac80211 support for NAN (Neighbor Aware Networking,
     aka Wi-Fi Aware) so less work must be in firmware

  Driver API:

   - Add numerical ID for devlink instances (to avoid having to create
     fake bus/device pairs just to have an ID). Support shared devlink
     instances which span multiple PFs

   - Add standard counters for reporting pause storm events (implement
     in mlx5 and fbnic)

   - Add configuration API for completion writeback buffering (implement
     in mana)

   - Support driver-initiated change of RSS context sizes

   - Support DPLL monitoring input frequency (implement in zl3073x)

   - Support per-port resources in devlink (implement in mlx5)

  Misc:

   - Expand the YAML spec for Netfilter

  Drivers

   - Software:
      - macvlan: support multicast rx for bridge ports with shared
        source MAC address
      - team: decouple receive and transmit enablement for IEEE 802.3ad
        LACP "independent control"

   - Ethernet high-speed NICs:
      - nVidia/Mellanox:
         - support high order pages in zero-copy mode (for payload
           coalescing)
         - support multiple packets in a page (for systems with 64kB
           pages)
      - Broadcom 25-400GE (bnxt):
         - implement XDP RSS hash metadata extraction
         - add software fallback for UDP GSO, lowering the IOMMU cost
      - Broadcom 800GE (bnge):
         - add link status and configuration handling
         - add various HW and SW statistics
      - Marvell/Cavium:
         - NPC HW block support for cn20k
      - Huawei (hinic3):
         - add mailbox / control queue
         - add rx VLAN offload
         - add driver info and link management

   - Ethernet NICs:
      - Marvell/Aquantia:
         - support reading SFP module info on some AQC100 cards
      - Realtek PCI (r8169):
         - add support for RTL8125cp
      - Realtek USB (r8152):
         - support for the RTL8157 5Gbit chip
         - add 2500baseT EEE status/configuration support

   - Ethernet NICs embedded and off-the-shelf IP:
      - Synopsys (stmmac):
         - cleanup and reorganize SerDes handling and PCS support
         - cleanup descriptor handling and per-platform data
         - cleanup and consolidate MDIO defines and handling
         - shrink driver memory use for internal structures
         - improve Tx IRQ coalescing
         - improve TCP segmentation handling
         - add support for Spacemit K3
      - Cadence (macb):
         - support PHYs that have inband autoneg disabled with GEM
         - support IEEE 802.3az EEE
         - rework usrio capabilities and handling
      - AMD (xgbe):
         - improve power management for S0i3
         - improve TX resilience for link-down handling

   - Virtual:
      - Google cloud vNIC:
         - support larger ring sizes in DQO-QPL mode
         - improve HW-GRO handling
         - support UDP GSO for DQO format
      - PCIe NTB:
         - support queue count configuration

   - Ethernet PHYs:
      - automatically disable PHY autonomous EEE if MAC is in charge
      - Broadcom:
         - add BCM84891/BCM84892 support
      - Micrel:
         - support for LAN9645X internal PHY
      - Realtek:
         - add RTL8224 pair order support
         - support PHY LEDs on RTL8211F-VD
         - support spread spectrum clocking (SSC)
      - Maxlinear:
         - add PHY-level statistics via ethtool

   - Ethernet switches:
      - Maxlinear (mxl862xx):
         - support for bridge offloading
         - support for VLANs
         - support driver statistics

   - Bluetooth:
      - large number of fixes and new device IDs
      - Mediatek:
         - support MT6639 (MT7927)
         - support MT7902 SDIO

   - WiFi:
      - Intel (iwlwifi):
         - UNII-9 and continuing UHR work
      - MediaTek (mt76):
         - mt7996/mt7925 MLO fixes/improvements
         - mt7996 NPU support (HW eth/wifi traffic offload)
      - Qualcomm (ath12k):
         - monitor mode support on IPQ5332
         - basic hwmon temperature reporting
         - support IPQ5424
      - Realtek:
         - add USB RX aggregation to improve performance
         - add USB TX flow control by tracking in-flight URBs

   - Cellular:
      - IPA v5.2 support"

* tag 'net-next-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1561 commits)
  net: pse-pd: fix kernel-doc function name for pse_control_find_by_id()
  wireguard: device: use exit_rtnl callback instead of manual rtnl_lock in pre_exit
  wireguard: allowedips: remove redundant space
  tools: ynl: add sample for wireguard
  wireguard: allowedips: Use kfree_rcu() instead of call_rcu()
  MAINTAINERS: Add netkit selftest files
  selftests/net: Add additional test coverage in nk_qlease
  selftests/net: Split netdevsim tests from HW tests in nk_qlease
  tools/ynl: Make YnlFamily closeable as a context manager
  net: airoha: Add missing PPE configurations in airoha_ppe_hw_init()
  net: airoha: Fix VIP configuration for AN7583 SoC
  net: caif: clear client service pointer on teardown
  net: strparser: fix skb_head leak in strp_abort_strp()
  net: usb: cdc-phonet: fix skb frags[] overflow in rx_complete()
  selftests/bpf: add test for xdp_master_redirect with bond not up
  net, bpf: fix null-ptr-deref in xdp_master_redirect() for down master
  net: airoha: Remove PCE_MC_EN_MASK bit in REG_FE_PCE_CFG configuration
  sctp: disable BH before calling udp_tunnel_xmit_skb()
  sctp: fix missing encap_port propagation for GSO fragments
  net: airoha: Rely on net_device pointer in ETS callbacks
  ...
This commit is contained in:
Linus Torvalds
2026-04-14 18:36:10 -07:00
parent f5ad410100 35c2c39832
commit 91a4855d6c
1687 changed files with 73589 additions and 26612 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
Documentation/devicetree/bindings/dpll/dpll-pin.yaml
View File

@@ -36,6 +36,19 @@ properties:
description: String exposed as the pin board label
$ref: /schemas/types.yaml#/definitions/string
ref-sync-sources:
description: |
List of phandles to input pins that can serve as the sync source
in a Reference-Sync pair with this pin acting as the clock source.
A Ref-Sync pair consists of a clock reference and a low-frequency
sync signal. The DPLL locks to the clock reference but
phase-aligns to the sync reference.
Only valid for input pins. Each referenced pin must be a
different input pin on the same device.
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
maxItems: 1
supported-frequencies-hz:
description: List of supported frequencies for this pin, expressed in Hz.

30
Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
View File

@@ -52,11 +52,19 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
pin@0 { /* REF0P */
sync0: pin@0 { /* REF0P - 1 PPS sync source */
reg = <0>;
connection-type = "ext";
label = "Input 0";
supported-frequencies-hz = /bits/ 64 <1 1000>;
label = "SMA1";
supported-frequencies-hz = /bits/ 64 <1>;
};
pin@1 { /* REF0N - clock source, can pair with sync0 */
reg = <1>;
connection-type = "ext";
label = "SMA2";
supported-frequencies-hz = /bits/ 64 <10000 10000000>;
ref-sync-sources = <&sync0>;
};
};
@@ -90,11 +98,19 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
pin@0 { /* REF0P */
sync1: pin@0 { /* REF0P - 1 PPS sync source */
reg = <0>;
connection-type = "ext";
label = "Input 0";
supported-frequencies-hz = /bits/ 64 <1 1000>;
connection-type = "gnss";
label = "GNSS_1PPS_IN";
supported-frequencies-hz = /bits/ 64 <1>;
};
pin@1 { /* REF0N - clock source */
reg = <1>;
connection-type = "gnss";
label = "GNSS_10M_IN";
supported-frequencies-hz = /bits/ 64 <10000000>;
ref-sync-sources = <&sync1>;
};
};

8
Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml
View File

@@ -44,6 +44,14 @@ properties:
signals a pending RX interrupt.
maxItems: 1
microchip,xstbyen:
type: boolean
description:
If present, configure the INT0/GPIO0/XSTBY pin as transceiver standby
control. The pin is driven low when the controller is active and high
when it enters Sleep mode, allowing automatic standby control of an
external CAN transceiver connected to this pin.
spi-max-frequency:
description:
Must be half or less of "clocks" frequency.

90
Documentation/devicetree/bindings/net/cdns,macb.yaml
View File

@@ -70,6 +70,14 @@ properties:
- microchip,sama7d65-gem # Microchip SAMA7D65 gigabit ethernet interface
- const: microchip,sama7g5-gem # Microchip SAMA7G5 gigabit ethernet interface
- items:
- const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC
- const: cdns,gem
- items:
- const: microchip,pic64hx-gem # Microchip PIC64HX
- const: microchip,pic64hpsc-gem # Microchip PIC64-HPSC
- const: cdns,gem
reg:
minItems: 1
items:
@@ -122,10 +130,23 @@ properties:
cdns,refclk-ext:
type: boolean
deprecated: true
description: |
This selects if the REFCLK for RMII is provided by an external source.
For RGMII mode this selects if the 125MHz REF clock is provided by an external
source.
This property has been replaced by cdns,refclk-source, as it only works
for devices that use an internal reference clock by default.
cdns,refclk-source:
$ref: /schemas/types.yaml#/definitions/string
enum:
- internal
- external
description:
This selects if the REFCLK for RMII is provided by an external source.
For RGMII mode this selects if the 125MHz REF clock is provided by an external
source.
Select whether or not the refclk for RGMII or RMII is provided by an
internal or external source. The default is device specific.
cdns,rx-watermark:
$ref: /schemas/types.yaml#/definitions/uint32
@@ -137,6 +158,12 @@ properties:
that need to be filled, before the forwarding process is activated.
Width of the SRAM is platform dependent, and can be 4, 8 or 16 bytes.
cdns,timer-adjust:
type: boolean
description:
Set when the hardware is operating in timer-adjust mode, where the timer
is controlled by the gem_tsu_inc_ctrl and gem_tsu_ms inputs.
'#address-cells':
const: 1
@@ -186,6 +213,15 @@ allOf:
properties:
reg:
maxItems: 1
- if:
not:
properties:
compatible:
contains:
const: microchip,mpfs-macb
then:
properties:
cdns,timer-adjust: false
- if:
properties:
@@ -196,6 +232,54 @@ allOf:
required:
- phys
- if:
properties:
compatible:
contains:
const: microchip,pic64hpsc-gem
then:
patternProperties:
"^ethernet-phy@[0-9a-f]$": false
properties:
mdio: false
- if:
not:
properties:
compatible:
contains:
enum:
- microchip,sama7g5-gem
- microchip,sama7g5-emac
then:
properties:
cdns,refclk-source: false
- if:
not:
properties:
compatible:
contains:
const: microchip,sama7g5-gem
then:
properties:
cdns,refclk-ext: false
- if:
properties:
compatible:
contains:
enum:
- microchip,sama7g5-emac
then:
properties:
cdns,refclk-source:
default: external
else:
properties:
cdns,refclk-source:
default: internal
unevaluatedProperties: false
examples:

1
Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml
View File

@@ -110,7 +110,6 @@ examples:
port@9 {
reg = <9>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "usxgmii";

2
Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
View File

@@ -143,8 +143,6 @@ allOf:
else:
properties:
spi-cpha: false
required:
- spi-cpol
unevaluatedProperties: false

14
Documentation/devicetree/bindings/net/ethernet-phy.yaml
View File

@@ -126,6 +126,20 @@ properties:
e.g. wrong bootstrap configuration caused by issues in PCB
layout design.
enet-phy-pair-order:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description:
For normal (0) or reverse (1) order of the pairs (ABCD -> DCBA).
enet-phy-pair-polarity:
$ref: /schemas/types.yaml#/definitions/uint32
maximum: 0xf
description:
A bitmap to describe pair polarity swap. Bit 0 to swap polarity of pair A,
bit 1 to swap polarity of pair B, bit 2 to swap polarity of pair C and bit
3 to swap polarity of pair D.
eee-broken-100tx:
$ref: /schemas/types.yaml#/definitions/flag
description:

6
Documentation/devicetree/bindings/net/micrel.yaml
View File

@@ -51,9 +51,10 @@ properties:
bits that are currently supported:
KSZ8001: register 0x1e, bits 15..14
KSZ8041: register 0x1e, bits 15..14
KSZ8021: register 0x1f, bits 5..4
KSZ8031: register 0x1f, bits 5..4
KSZ8041: register 0x1e, bits 15..14
KSZ8041RNLI: register 0x1e, bits 15..14
KSZ8051: register 0x1f, bits 5..4
KSZ8081: register 0x1f, bits 5..4
KSZ8091: register 0x1f, bits 5..4
@@ -80,9 +81,10 @@ allOf:
contains:
enum:
- ethernet-phy-id0022.1510
- ethernet-phy-id0022.1537
- ethernet-phy-id0022.1550
- ethernet-phy-id0022.1555
- ethernet-phy-id0022.1556
- ethernet-phy-id0022.1550
- ethernet-phy-id0022.1560
- ethernet-phy-id0022.161a
then:

68
Documentation/devicetree/bindings/net/microchip,pic64hpsc-mdio.yaml Normal file
View File

@@ -0,0 +1,68 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/microchip,pic64hpsc-mdio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip PIC64-HPSC/HX MDIO controller
maintainers:
- Charles Perry <charles.perry@microchip.com>
description:
This is the MDIO bus controller present in Microchip PIC64-HPSC/HX SoCs. It
supports C22 and C45 register access and is named "MDIO Initiator" in the
documentation.
allOf:
- $ref: mdio.yaml#
properties:
compatible:
oneOf:
- const: microchip,pic64hpsc-mdio
- items:
- const: microchip,pic64hx-mdio
- const: microchip,pic64hpsc-mdio
reg:
maxItems: 1
clocks:
maxItems: 1
clock-frequency:
default: 2500000
interrupts:
maxItems: 1
required:
- compatible
- reg
- clocks
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
mdio@4000c21e000 {
compatible = "microchip,pic64hpsc-mdio";
reg = <0x400 0x0c21e000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&svc_clk>;
interrupt-parent = <&saplic0>;
interrupts = <168 IRQ_TYPE_LEVEL_HIGH>;
ethernet-phy@0 {
reg = <0>;
};
};
};

1
Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml
View File

@@ -18,6 +18,7 @@ properties:
- nxp,nq310
- nxp,pn547
- nxp,pn553
- nxp,pn557
- const: nxp,nxp-nci-i2c
enable-gpios:

140
Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml Normal file
View File

@@ -0,0 +1,140 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Nuvoton DWMAC glue layer controller
maintainers:
- Joey Lu <yclu4@nuvoton.com>
description:
Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on
Synopsys DesignWare MAC (version 3.73a).
select:
properties:
compatible:
contains:
enum:
- nuvoton,ma35d1-dwmac
required:
- compatible
allOf:
- $ref: snps,dwmac.yaml#
properties:
compatible:
items:
- const: nuvoton,ma35d1-dwmac
- const: snps,dwmac-3.70a
reg:
maxItems: 1
description:
Register range should be one of the GMAC interface.
interrupts:
maxItems: 1
clocks:
items:
- description: MAC clock
- description: PTP clock
clock-names:
items:
- const: stmmaceth
- const: ptp_ref
nuvoton,sys:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to access syscon registers.
- description: GMAC interface ID.
enum:
- 0
- 1
description:
A phandle to the syscon with one argument that configures system registers
for MA35D1's two GMACs. The argument specifies the GMAC interface ID.
resets:
maxItems: 1
reset-names:
items:
- const: stmmaceth
phy-mode:
enum:
- rmii
- rgmii
- rgmii-id
- rgmii-txid
- rgmii-rxid
tx-internal-delay-ps:
default: 0
minimum: 0
maximum: 2000
description:
RGMII TX path delay used only when PHY operates in RGMII mode with
internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
Allowed values are from 0 to 2000.
rx-internal-delay-ps:
default: 0
minimum: 0
maximum: 2000
description:
RGMII RX path delay used only when PHY operates in RGMII mode with
internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
Allowed values are from 0 to 2000.
required:
- clocks
- clock-names
- nuvoton,sys
- resets
- reset-names
- phy-mode
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
#include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
ethernet@40120000 {
compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
reg = <0x40120000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
clock-names = "stmmaceth", "ptp_ref";
nuvoton,sys = <&sys 0>;
resets = <&sys MA35D1_RESET_GMAC0>;
reset-names = "stmmaceth";
snps,multicast-filter-bins = <0>;
snps,perfect-filter-entries = <8>;
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
phy-mode = "rgmii-id";
phy-handle = <&eth_phy0>;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
eth_phy0: ethernet-phy@0 {
reg = <0>;
};
};
};

47
Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
View File

@@ -1,5 +1,5 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2021-2024 NXP
# Copyright 2021-2026 NXP
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
@@ -16,6 +16,8 @@ description:
the SoC S32R45 has two instances. The devices can use RGMII/RMII/MII
interface over Pinctrl device or the output can be routed
to the embedded SerDes for SGMII connectivity.
The DWMAC instances have connected all RX/TX queues interrupts,
enabling load balancing of data traffic across all CPU cores.
properties:
compatible:
@@ -45,10 +47,25 @@ properties:
FlexTimer Modules connect to GMAC_0.
interrupts:
maxItems: 1
minItems: 1
maxItems: 11
interrupt-names:
const: macirq
oneOf:
- items:
- const: macirq
- items:
- const: macirq
- const: tx-queue-0
- const: rx-queue-0
- const: tx-queue-1
- const: rx-queue-1
- const: tx-queue-2
- const: rx-queue-2
- const: tx-queue-3
- const: rx-queue-3
- const: tx-queue-4
- const: rx-queue-4
clocks:
items:
@@ -88,8 +105,28 @@ examples:
<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
nxp,phy-sel = <&gpr 0x4>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 0: tx, rx */
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 1: tx, rx */
<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 2: tx, rx */
<GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 3: tx, rx */
<GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
/* CHN 4: tx, rx */
<GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq",
"tx-queue-0", "rx-queue-0",
"tx-queue-1", "rx-queue-1",
"tx-queue-2", "rx-queue-2",
"tx-queue-3", "rx-queue-3",
"tx-queue-4", "rx-queue-4";
snps,mtl-rx-config = <&mtl_rx_setup>;
snps,mtl-tx-config = <&mtl_tx_setup>;
clocks = <&clks 24>, <&clks 17>, <&clks 16>, <&clks 15>;

12
Documentation/devicetree/bindings/net/qcom,ipa.yaml
View File

@@ -44,6 +44,7 @@ properties:
compatible:
oneOf:
- enum:
- qcom,milos-ipa
- qcom,msm8998-ipa
- qcom,sc7180-ipa
- qcom,sc7280-ipa
@@ -53,6 +54,10 @@ properties:
- qcom,sm6350-ipa
- qcom,sm8350-ipa
- qcom,sm8550-ipa
- items:
- enum:
- qcom,qcm2290-ipa
- const: qcom,sc7180-ipa
- items:
- enum:
- qcom,sm8650-ipa
@@ -165,6 +170,13 @@ properties:
initializing IPA hardware. Optional, and only used when
Trust Zone performs early initialization.
sram:
maxItems: 1
description:
A reference to an additional region residing in IMEM (special
on-chip SRAM), which is accessed by the IPA firmware and needs
to be IOMMU-mapped from the OS.
required:
- compatible
- iommus

19
Documentation/devicetree/bindings/net/realtek,rtl82xx.yaml
View File

@@ -40,15 +40,30 @@ properties:
leds: true
realtek,aldps-enable:
type: boolean
description:
Enable ALDPS mode, ALDPS mode default is disabled after hardware reset.
realtek,clkout-disable:
type: boolean
description:
Disable CLKOUT clock, CLKOUT clock default is enabled after hardware reset.
realtek,aldps-enable:
realtek,clkout-ssc-enable:
type: boolean
description:
Enable ALDPS mode, ALDPS mode default is disabled after hardware reset.
Enable CLKOUT SSC mode, CLKOUT SSC mode default is disabled after hardware reset.
realtek,rxc-ssc-enable:
type: boolean
description:
Enable RXC SSC mode, RXC SSC mode default is disabled after hardware reset.
realtek,sysclk-ssc-enable:
type: boolean
description:
Enable SYSCLK SSC mode, SYSCLK SSC mode default is disabled after hardware reset.
wakeup-source:
type: boolean

21
Documentation/devicetree/bindings/net/snps,dwmac.yaml
View File

@@ -69,6 +69,7 @@ properties:
- ingenic,x2000-mac
- loongson,ls2k-dwmac
- loongson,ls7a-dwmac
- nuvoton,ma35d1-dwmac
- nxp,s32g2-dwmac
- qcom,qcs404-ethqos
- qcom,sa8775p-ethqos
@@ -109,6 +110,7 @@ properties:
- snps,dwmac-5.10a
- snps,dwmac-5.20
- snps,dwmac-5.30a
- snps,dwmac-5.40a
- snps,dwxgmac
- snps,dwxgmac-2.10
- sophgo,sg2042-dwmac
@@ -202,11 +204,8 @@ properties:
* snps,xit_frm, unlock on WoL
* snps,wr_osr_lmt, max write outstanding req. limit
* snps,rd_osr_lmt, max read outstanding req. limit
* snps,kbbe, do not cross 1KiB boundary.
* snps,blen, this is a vector of supported burst length.
* snps,fb, fixed-burst
* snps,mb, mixed-burst
* snps,rb, rebuild INCRx Burst
snps,mtl-rx-config:
$ref: /schemas/types.yaml#/definitions/phandle
@@ -586,11 +585,6 @@ properties:
description:
max read outstanding req. limit
snps,kbbe:
$ref: /schemas/types.yaml#/definitions/flag
description:
do not cross 1KiB boundary.
snps,blen:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
@@ -603,16 +597,6 @@ properties:
description:
fixed-burst
snps,mb:
$ref: /schemas/types.yaml#/definitions/flag
description:
mixed-burst
snps,rb:
$ref: /schemas/types.yaml#/definitions/flag
description:
rebuild INCRx Burst
required:
- compatible
- reg
@@ -656,6 +640,7 @@ allOf:
- snps,dwmac-5.10a
- snps,dwmac-5.20
- snps,dwmac-5.30a
- snps,dwmac-5.40a
- snps,dwxgmac
- snps,dwxgmac-2.10
- st,spear600-gmac

102
Documentation/devicetree/bindings/net/spacemit,k3-dwmac.yaml Normal file
View File

@@ -0,0 +1,102 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/spacemit,k3-dwmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Spacemit K3 DWMAC glue layer
maintainers:
- Inochi Amaoto <inochiama@gmail.com>
select:
properties:
compatible:
contains:
const: spacemit,k3-dwmac
required:
- compatible
properties:
compatible:
items:
- const: spacemit,k3-dwmac
- const: snps,dwmac-5.40a
reg:
maxItems: 1
clocks:
items:
- description: GMAC application clock
- description: PTP clock
- description: TX clock
clock-names:
items:
- const: stmmaceth
- const: ptp_ref
- const: tx
interrupts:
minItems: 1
items:
- description: MAC interrupt
- description: MAC wake interrupt
interrupt-names:
minItems: 1
items:
- const: macirq
- const: eth_wake_irq
resets:
maxItems: 1
reset-names:
const: stmmaceth
spacemit,apmu:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the syscon node which control the glue register
- description: offset of the control register
- description: offset of the dline register
description:
A phandle to syscon with offset to control registers for this MAC
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
- interrupt-names
- resets
- reset-names
- spacemit,apmu
allOf:
- $ref: snps,dwmac.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
ethernet@cac80000 {
compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
reg = <0xcac80000 0x2000>;
clocks = <&syscon_apmu 66>, <&syscon_apmu 68>,
<&syscon_apmu 69>;
clock-names = "stmmaceth", "ptp_ref", "tx";
interrupts = <131 IRQ_TYPE_LEVEL_HIGH>, <276 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
resets = <&syscon_apmu 67>;
reset-names = "stmmaceth";
spacemit,apmu = <&syscon_apmu 0x384 0x38c>;
};

19
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
View File

@@ -53,13 +53,18 @@ properties:
"#size-cells": true
compatible:
enum:
- ti,am642-cpsw-nuss
- ti,am654-cpsw-nuss
- ti,j7200-cpswxg-nuss
- ti,j721e-cpsw-nuss
- ti,j721e-cpswxg-nuss
- ti,j784s4-cpswxg-nuss
oneOf:
- enum:
- ti,am642-cpsw-nuss
- ti,am654-cpsw-nuss
- ti,j7200-cpswxg-nuss
- ti,j721e-cpsw-nuss
- ti,j721e-cpswxg-nuss
- ti,j784s4-cpswxg-nuss
- items:
- enum:
- ti,j722s-cpsw-nuss
- const: ti,am642-cpsw-nuss
reg:
maxItems: 1

1
Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml
View File

@@ -42,6 +42,7 @@ properties:
- brcm,bcm4356-fmac
- brcm,bcm4359-fmac
- brcm,bcm4366-fmac
- brcm,bcm43752-fmac
- cypress,cyw4373-fmac
- cypress,cyw43012-fmac
- infineon,cyw43439-fmac

11
Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml
View File

@@ -171,6 +171,12 @@ properties:
Quirk specifying that the firmware expects the 8bit version
of the host capability QMI request
qcom,snoc-host-cap-skip-quirk:
type: boolean
description:
Quirk specifying that the firmware wants to skip the host
capability QMI request
qcom,xo-cal-data:
$ref: /schemas/types.yaml#/definitions/uint32
description:
@@ -292,6 +298,11 @@ allOf:
required:
- interrupts
- not:
required:
- qcom,snoc-host-cap-8bit-quirk
- qcom,snoc-host-cap-skip-quirk
examples:
# SNoC
- |

1
Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml
View File

@@ -17,6 +17,7 @@ properties:
compatible:
enum:
- qcom,ipq5332-wifi
- qcom,ipq5424-wifi
reg:
maxItems: 1

14
Documentation/devicetree/bindings/sram/qcom,imem.yaml
View File

@@ -67,6 +67,20 @@ properties:
$ref: /schemas/power/reset/syscon-reboot-mode.yaml#
patternProperties:
"^modem-tables@[0-9a-f]+$":
type: object
description:
Region containing packet processing configuration for the IP Accelerator.
properties:
reg:
maxItems: 1
required:
- reg
additionalProperties: false
"^pil-reloc@[0-9a-f]+$":
$ref: /schemas/remoteproc/qcom,pil-info.yaml#
description: Peripheral image loader relocation region